From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755911AbcBXDeL (ORCPT ); Tue, 23 Feb 2016 22:34:11 -0500 Received: from mezzanine.sirena.org.uk ([106.187.55.193]:59708 "EHLO mezzanine.sirena.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755997AbcBXDeI (ORCPT ); Tue, 23 Feb 2016 22:34:08 -0500 Date: Wed, 24 Feb 2016 12:32:59 +0900 From: Mark Brown To: Heiko Stuebner Cc: Pierre-Louis Bossart , Sugar Zhang , Mark Rutland , Oder Chiou , alsa-devel@alsa-project.org, Pawel Moll , Ian Campbell , linux-kernel@vger.kernel.org, Takashi Iwai , Liam Girdwood , devicetree@vger.kernel.org, Rob Herring , Kumar Gala , Bard Liao Message-ID: <20160224033259.GL18327@sirena.org.uk> References: <1456190782-18865-1-git-send-email-sugar.zhang@rock-chips.com> <56CC719C.1090901@linux.intel.com> <2199435.lA9iTvxnKV@phil> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="sUeeoP6xcRoKhsB+" Content-Disposition: inline In-Reply-To: <2199435.lA9iTvxnKV@phil> X-Cookie: Adapt. Enjoy. Survive. User-Agent: Mutt/1.5.24 (2015-08-30) X-SA-Exim-Connect-IP: 175.126.181.164 X-SA-Exim-Mail-From: broonie@sirena.org.uk Subject: Re: [alsa-devel] [PATCH] ASoC: rt5640: add master clock handling for rt5640 X-SA-Exim-Version: 4.2.1 (built Mon, 26 Dec 2011 16:24:06 +0000) X-SA-Exim-Scanned: Yes (on mezzanine.sirena.org.uk) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --sUeeoP6xcRoKhsB+ Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Feb 24, 2016 at 12:08:31AM +0100, Heiko Stuebner wrote: > Am Dienstag, 23. Februar 2016, 08:50:04 schrieb Pierre-Louis Bossart: > > This patch assumes that the information on mclk comes from DeviceTree. > > The mclk may also be enabled/disabled in the machine driver with an > > explicit transition to use an internal clock when the codec is not used. > > I hope this patch doesn't preclude such usages or there will be a > > conflict with the patches we are about to upstream for Baytrail/cht > > devices. > As you can see, the clock property itself is optional and the clk_get bel= ow=20 > acts accordingly of also continuing if the clock is not present. > So it won't affect any users doing it otherwise. That said we really do need x86 to transition to use the clock API in order to integrate with external devices, where the machine driver does manage clocks we want that to move to being done using the clock API rather than custom APIs. --sUeeoP6xcRoKhsB+ Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQEcBAEBCAAGBQJWzSRrAAoJECTWi3JdVIfQbv8H/3oqQbWebeAQzP6byQrUktJ+ c4ET+PMv/zGNQB56z59nPVoCq8f3f2pNwpjVZisyfx9b5X3nS0pAGklD0bMoVQ6w zioasc1imvrIhsOpgdUGN7pITmvrXDVpCClofdYLV2XPHL9Oyile9fVvGLESI7hm KT8b5AtgiatEO/QuzyE/rHCHfs+VW/gPiurV0rMviQSi8vaUm/iA9DDqI2CsXHZG WbWymCyLEdbm9ms4+3J+5aoHK3/nbKCcowF/JvCTKOz4uuzeJfJKQX7k5lq0CrRL zy6lzI62g9/BEYVz6P6U0VrPIIP+/YQH1jCK5zmYOpJdhpexJ6NkGCoEsgjUsEo= =SGcL -----END PGP SIGNATURE----- --sUeeoP6xcRoKhsB+--