From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933233AbcBYQP2 (ORCPT ); Thu, 25 Feb 2016 11:15:28 -0500 Received: from hqemgate14.nvidia.com ([216.228.121.143]:2844 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932596AbcBYQPZ (ORCPT ); Thu, 25 Feb 2016 11:15:25 -0500 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Thu, 25 Feb 2016 08:14:18 -0800 Date: Thu, 25 Feb 2016 17:15:11 +0100 From: Thierry Reding To: Laxman Dewangan CC: , , , , , , , , , , , , , , , , , Subject: Re: [PATCH V8 0/8] Add support for MAXIM MAX77620/MAX20024 PMIC Message-ID: <20160225161510.GB1903@ulmo.nvidia.com> References: <1455191794-6065-1-git-send-email-ldewangan@nvidia.com> <20160216160029.GC11400@ulmo.nvidia.com> <56C7EE58.8000905@nvidia.com> MIME-Version: 1.0 In-Reply-To: <56C7EE58.8000905@nvidia.com> X-NVConfidentiality: public User-Agent: Mutt/1.5.24 (2015-08-30) X-Originating-IP: [10.2.69.105] X-ClientProxiedBy: UKMAIL102.nvidia.com (10.26.138.15) To UKMAIL102.nvidia.com (10.26.138.15) Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="jq0ap7NbKX2Kqbes" Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --jq0ap7NbKX2Kqbes Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Sat, Feb 20, 2016 at 10:10:56AM +0530, Laxman Dewangan wrote: >=20 > On Tuesday 16 February 2016 09:30 PM, Thierry Reding wrote: > >On Thu, Feb 11, 2016 at 05:26:26PM +0530, Laxman Dewangan wrote: > >>Add SW support for MAXIM Semiconductor's Power Management > >>IC (PMIC) MAX77620/MAX20024. This PMIC supports DC-DC/LDOS, GPIOs, > >>RTC, watchdog, clocks etc. > >Hi Laxman, > > > >This series is starting to look pretty good. Do you have patches in the > >works to add the corresponding DT content for the various boards that we > >support? I think the Jetson TX1 patch would be most interesting since > >that's what people can get their hands on. > > >=20 > Yes, I am just waiting for this series to be concluded and applied. Once = it > is done, I will immediately post the patches to enable this driver in con= fig > and dt entry for the Jetson-TX1. Why hold back on the patches? I'm currently having trouble testing your stash here on Jetson TX1 and I suspect that I'm using the wrong device tree content (it was derived from downstream many moons ago). There's nothing wrong with posting patches that depend on patches on the list. Typically you'd note the dependency in the cover letter to make it easier for people to find what belongs together. Thierry --jq0ap7NbKX2Kqbes Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABCAAGBQJWzyiOAAoJEN0jrNd/PrOhx6wP/j3nl4wG3BodnmqWDktA7uJK KmhX4+Xd/vdP31e9Hp1EEauCNG9dxz7rAKeWNxsI+leY2IXJplSbgLW6lRjJNMs2 27W4EPUrqmzFqwEofVAVu9hZF4aTkXF9QWjgI1OEAad2W9w22ahzZ9WKWwERjKLE ROHQtZ9fL3BBfdpGyz8Ama8q1jdueE3A3/e92AgsCl8GV5ut3QQpVTDbrt6jrkDC c6FhzT3w+ftDlY+RHdK7RHIL8XlJgwthMpXdnzEhANkK8+GusAua/eZ97t7FeG2j 2GV2bPXfWFJXRxdRQ/2ujxZ12xUahHHddpYz2NgvH4IVZ3Gd1IYdvwjkNYuFnnVV OqeeuxaWf/jsVrjuGgIT0o0gdEQJQx+6wVyQGHRUyhX+BbXHX3VffxIlwxudK/qE Np0u3+tKAEvzn71EfWaVKsr1EIdih+zWYsBrno3zik/iv0XwqsDSr6ueaidaPp2j 9WrzYACNbXSoYuCeN+hfA74FG7iOPycY7bYujl6aXchcG4FhJIcT4WFURytqghsu KgrXJmOVgKszr5Q7bsYuGsVAVERDSJEHpF3IVD2av9OqKqkZqzPtMaPPa6okVef7 Q/sxRk13Sa+Oww1NMhm6UCy1pQIaoLNepq0FIF2EY1L7e1OHs4QRnWUveYhm/hmb KCZ9etWc/J9GD+KkHk+2 =4kMH -----END PGP SIGNATURE----- --jq0ap7NbKX2Kqbes--