From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752674AbcCASOQ (ORCPT ); Tue, 1 Mar 2016 13:14:16 -0500 Received: from bombadil.infradead.org ([198.137.202.9]:39975 "EHLO bombadil.infradead.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751458AbcCASOL (ORCPT ); Tue, 1 Mar 2016 13:14:11 -0500 Date: Tue, 1 Mar 2016 19:14:04 +0100 From: Peter Zijlstra To: Jiri Olsa Cc: Andi Kleen , "Liang, Kan" , Arnaldo Carvalho de Melo , Ingo Molnar , Stephane Eranian , Wang Nan , "zheng.z.yan@intel.com" , LKML Subject: Re: [BUG] Core2 cpu triggers hard lockup with perf test Message-ID: <20160301181404.GA6356@twins.programming.kicks-ass.net> References: <20160227123636.GB30858@krava.redhat.com> <37D7C6CF3E00A74B8858931C1DB2F0770589EC94@SHSMSX103.ccr.corp.intel.com> <20160301091703.GN6356@twins.programming.kicks-ass.net> <20160301110651.GA15260@krava.redhat.com> <20160301145105.GQ5083@two.firstfloor.org> <20160301145909.GS6356@twins.programming.kicks-ass.net> <20160301171722.GA2666@krava.redhat.com> <20160301174903.GX6356@twins.programming.kicks-ass.net> <20160301180440.GA6769@krava.redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20160301180440.GA6769@krava.redhat.com> User-Agent: Mutt/1.5.21 (2012-12-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Mar 01, 2016 at 07:04:40PM +0100, Jiri Olsa wrote: > > That's the PERF_GLOBAL_CTRL, right? But it must have succeeded, > > yep, should be this one: > > static void __intel_pmu_enable_all(int added, bool pmi) > { > struct cpu_hw_events *cpuc = this_cpu_ptr(&cpu_hw_events); > > intel_pmu_pebs_enable_all(); > intel_pmu_lbr_enable_all(pmi); > >>> wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL, > x86_pmu.intel_ctrl & ~cpuc->intel_ctrl_guest_mask); > > > > otherwise the NMI watchdog would never have fired. > > so NMI wouldn't trigger if CPU is inside wrmsr? Well, anything goes with MSR writes, that's all a magic heap of micro-code. But at the very least it did actually enable the counters, otherwise the counter used for the NMI watchdog could not fire, it too would still be disabled.