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From: Mauro Carvalho Chehab <m.chehab@samsung.com>
To: Rob Herring <robh@kernel.org>
Cc: tthayer@opensource.altera.com, bp@alien8.de,
	dougthompson@xmission.com, pawel.moll@arm.com,
	mark.rutland@arm.com, ijc+devicetree@hellion.org.uk,
	galak@codeaurora.org, linux@arm.linux.org.uk,
	dinguyen@opensource.altera.com, grant.likely@linaro.org,
	devicetree@vger.kernel.org, linux-doc@vger.kernel.org,
	linux-edac@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, tthayer.linux@gmail.com
Subject: Re: [PATCH] Add EDAC peripheral init functions & Ethernet EDAC.
Date: Fri, 15 Apr 2016 06:40:42 -0300	[thread overview]
Message-ID: <20160415064042.330406ab.m.chehab@samsung.com> (raw)
In-Reply-To: <20160414143501.GA25212@rob-hp-laptop>

Em Thu, 14 Apr 2016 09:35:01 -0500
Rob Herring <robh@kernel.org> escreveu:

> On Tue, Apr 12, 2016 at 05:12:55PM -0500, tthayer@opensource.altera.com wrote:
> > This patch set adds the memory initialization functions for Altera's
> > Arria10 peripherals, the first of which is the Ethernet EDAC. The
> > first 3 patches add the memory initialization functionality. The
> > last 3 patches add Ethernet EDAC support.  
> 
> The ethernet part seems a bit strange to me to put under EDAC as EDAC 
> is primarily memory controller ECC (and caches to some extent). Also you 
> would not halt the system in case of an UC, but rather just drop the 
> frame. This would need to be part of the ethernet driver in that case.
>  
> Of course, given that ethernet frames already have a CRC, ECC of the 
> FIFO seems a bit redundant.

Actually, EDAC was conceived to be a way to report hardware errors, and,
although the main use case is for memory and CPU errors, there are a few
drivers that report errors at PCI bus. So, I don't see much problems using
it to report other hardware errors, like the ones associated with the
Ethernet hardware.

That's said, things like Ethernet frame errors are better handled via the
network drivers. I would report via EDAC only errors associated with the
Ethernet hardware that would cause the hardware to malfunction.

Btw, an UC error won't cause the system to halt, except if a UC memory
error happens and the EDAC core is loaded with an special modprobe
parameter (edac_mc_panic_on_ue = 1).

-- 
Thanks,
Mauro

  reply	other threads:[~2016-04-15  9:51 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-04-12 22:12 tthayer
2016-04-12 22:12 ` [PATCH 1/6] EDAC, altera: Check parent status for Arria10 EDAC block tthayer
2016-04-12 22:12 ` [PATCH 2/6] EDAC, altera: Move IRQ function declaration tthayer
2016-04-12 22:12 ` [PATCH 3/6] EDAC, altera: Add Arria10 ECC memory init functions tthayer
2016-04-12 22:12 ` [PATCH 4/6] Documentation: dt: socfpga: Add Arria10 Ethernet binding tthayer
2016-04-12 22:13 ` [PATCH 5/6] EDAC, altera: Add Arria10 Ethernet EDAC support tthayer
2016-04-12 22:13 ` [PATCH 6/6] ARM: dts: Add Arria10 Ethernet EDAC devicetree entry tthayer
2016-04-14 14:35 ` [PATCH] Add EDAC peripheral init functions & Ethernet EDAC Rob Herring
2016-04-15  9:40   ` Mauro Carvalho Chehab [this message]
2016-04-15 15:27     ` Thor Thayer
2016-04-15 21:46       ` Borislav Petkov
2016-04-18 14:27         ` Thor Thayer
2016-04-18 20:02           ` Borislav Petkov
2016-04-18 20:06             ` Borislav Petkov
2016-04-18 20:25               ` Thor Thayer
2016-04-18 20:15             ` Thor Thayer

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