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From: James Hogan <james.hogan@imgtec.com>
To: Paul Burton <paul.burton@imgtec.com>
Cc: <linux-mips@linux-mips.org>, Ralf Baechle <ralf@linux-mips.org>,
	"Paul Gortmaker" <paul.gortmaker@windriver.com>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 06/12] MIPS: mm: Unify pte_page definition
Date: Sat, 16 Apr 2016 00:16:53 +0100	[thread overview]
Message-ID: <20160415231653.GK7859@jhogan-linux.le.imgtec.org> (raw)
In-Reply-To: <1460716620-13382-7-git-send-email-paul.burton@imgtec.com>

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On Fri, Apr 15, 2016 at 11:36:54AM +0100, Paul Burton wrote:
> The same definition for pte_page is duplicated for the MIPS32
> PHYS_ADDR_T_64BIT case & the generic case. Unify them by moving a single
> definition outside of preprocessor conditionals.
> 
> Signed-off-by: Paul Burton <paul.burton@imgtec.com>

Reviewed-by: James Hogan <james.hogan@imgtec.com>

Cheers
James

> ---
> 
>  arch/mips/include/asm/pgtable-32.h | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/arch/mips/include/asm/pgtable-32.h b/arch/mips/include/asm/pgtable-32.h
> index 832e216..181bd8e 100644
> --- a/arch/mips/include/asm/pgtable-32.h
> +++ b/arch/mips/include/asm/pgtable-32.h
> @@ -104,7 +104,7 @@ static inline void pmd_clear(pmd_t *pmdp)
>  }
>  
>  #if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
> -#define pte_page(x)		pfn_to_page(pte_pfn(x))
> +
>  #define pte_pfn(x)		(((unsigned long)((x).pte_high >> _PFN_SHIFT)) | (unsigned long)((x).pte_low << _PAGE_PRESENT_SHIFT))
>  static inline pte_t
>  pfn_pte(unsigned long pfn, pgprot_t prot)
> @@ -120,8 +120,6 @@ pfn_pte(unsigned long pfn, pgprot_t prot)
>  
>  #else
>  
> -#define pte_page(x)		pfn_to_page(pte_pfn(x))
> -
>  #ifdef CONFIG_CPU_VR41XX
>  #define pte_pfn(x)		((unsigned long)((x).pte >> (PAGE_SHIFT + 2)))
>  #define pfn_pte(pfn, prot)	__pte(((pfn) << (PAGE_SHIFT + 2)) | pgprot_val(prot))
> @@ -131,6 +129,8 @@ pfn_pte(unsigned long pfn, pgprot_t prot)
>  #endif
>  #endif /* defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32) */
>  
> +#define pte_page(x)		pfn_to_page(pte_pfn(x))
> +
>  #define __pgd_offset(address)	pgd_index(address)
>  #define __pud_offset(address)	(((address) >> PUD_SHIFT) & (PTRS_PER_PUD-1))
>  #define __pmd_offset(address)	(((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
> -- 
> 2.8.0
> 

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  reply	other threads:[~2016-04-15 23:16 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <1460716620-13382-1-git-send-email-paul.burton@imgtec.com>
2016-04-15 10:36 ` [PATCH 01/12] MIPS: Separate XPA CPU feature into LPA and MVH Paul Burton
2016-04-15 10:36 ` [PATCH 02/12] MIPS: Fix HTW config on XPA kernel without LPA enabled Paul Burton
2016-04-15 10:36 ` [PATCH 03/12] MIPS: Remove redundant asm/pgtable-bits.h inclusions Paul Burton
2016-04-15 19:16   ` James Hogan
2016-04-15 21:19     ` Paul Burton
2016-04-15 10:36 ` [PATCH 04/12] MIPS: Use enums to make asm/pgtable-bits.h readable Paul Burton
2016-04-15 20:29   ` James Hogan
2016-05-11  9:38     ` Ralf Baechle
2016-04-15 10:36 ` [PATCH 06/12] MIPS: mm: Unify pte_page definition Paul Burton
2016-04-15 23:16   ` James Hogan [this message]
2016-04-15 10:36 ` [PATCH 08/12] MIPS: mm: Don't clobber $1 on XPA TLB refill Paul Burton
2016-04-15 10:36 ` [PATCH 09/12] MIPS: mm: Pass scratch register through to iPTE_SW Paul Burton
2016-04-15 22:28   ` James Hogan
2016-04-15 10:36 ` [PATCH 10/12] MIPS: mm: Be more explicit about PTE mode bit handling Paul Burton
2016-04-15 10:36 ` [PATCH 11/12] MIPS: mm: Simplify build_update_entries Paul Burton
2016-04-15 23:09   ` James Hogan
2016-04-15 10:37 ` [PATCH 12/12] MIPS: mm: Don't do MTHC0 if XPA not present Paul Burton
2016-05-10 12:44 ` [PATCH 00/12] TLB/XPA fixes & cleanups Ralf Baechle
2016-05-10 17:47   ` Florian Fainelli
2016-05-11 10:03     ` Ralf Baechle
2016-05-11 19:17       ` Florian Fainelli

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