From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752704AbcEQLNl (ORCPT ); Tue, 17 May 2016 07:13:41 -0400 Received: from foss.arm.com ([217.140.101.70]:51309 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750758AbcEQLNk (ORCPT ); Tue, 17 May 2016 07:13:40 -0400 Date: Tue, 17 May 2016 12:13:34 +0100 From: Catalin Marinas To: Yang Shi Cc: ast@kernel.org, davem@davemloft.net, linaro-kernel@lists.linaro.org, daniel@iogearbox.net, will.deacon@arm.com, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, zlim.lnx@gmail.com, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v2 net-next] bpf: arm64: remove callee-save registers use for tmp registers Message-ID: <20160517111334.GD23555@e104818-lin.cambridge.arm.com> References: <1463441786-32224-1-git-send-email-yang.shi@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1463441786-32224-1-git-send-email-yang.shi@linaro.org> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, May 16, 2016 at 04:36:26PM -0700, Yang Shi wrote: > In the current implementation of ARM64 eBPF JIT, R23 and R24 are used for > tmp registers, which are callee-saved registers. This leads to variable size > of JIT prologue and epilogue. The latest blinding constant change prefers to > constant size of prologue and epilogue. AAPCS reserves R9 ~ R15 for temp > registers which not need to be saved/restored during function call. So, replace > R23 and R24 to R10 and R11, and remove tmp_used flag to save 2 instructions for > some jited BPF program. > > CC: Daniel Borkmann > Acked-by: Zi Shen Lim > Signed-off-by: Yang Shi Acked-by: Catalin Marinas