From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753617AbcESBxP (ORCPT ); Wed, 18 May 2016 21:53:15 -0400 Received: from eu-smtp-delivery-143.mimecast.com ([146.101.78.143]:39051 "EHLO eu-smtp-delivery-143.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753257AbcESBxM convert rfc822-to-8bit (ORCPT ); Wed, 18 May 2016 21:53:12 -0400 Date: Thu, 19 May 2016 09:52:24 +0800 From: Huang Shijie To: David Long CC: Catalin Marinas , Will Deacon , Sandeepa Prabhu , William Cohen , Pratyush Anand , Steve Capper , , , Marc Zyngier , Mark Rutland , Petr Mladek , Viresh Kumar , John Blackwood , Feng Kan , Zi Shen Lim , Dave P Martin , Yang Shi , Vladimir Murzin , Kees Cook , "Suzuki K. Poulose" , Mark Brown , Alex =?iso-8859-1?Q?Benn=E9e?= , Ard Biesheuvel , Greg Kroah-Hartman , Mark Salyzyn , James Morse , Christoffer Dall , Andrew Morton , Robin Murphy , Jens Wiklander , Balamurugan Shanmugam , Subject: Re: [PATCH v12 07/10] arm64: kprobes instruction simulation support Message-ID: <20160519015222.GA25870@sha-win-210.asiapac.arm.com> References: <1461783185-9056-1-git-send-email-dave.long@linaro.org> <1461783185-9056-8-git-send-email-dave.long@linaro.org> MIME-Version: 1.0 In-Reply-To: <1461783185-9056-8-git-send-email-dave.long@linaro.org> User-Agent: Mutt/1.6.0 (2016-04-01) X-Originating-IP: [101.230.208.200] X-ClientProxiedBy: OS2PR01CA0016.jpnprd01.prod.outlook.com (10.161.74.154) To HE1PR08MB0505.eurprd08.prod.outlook.com (10.161.120.152) X-MS-Office365-Filtering-Correlation-Id: 9d41fa78-5c1a-4e83-d327-08d37f885228 X-Microsoft-Exchange-Diagnostics: 1;HE1PR08MB0505;2:pkZbs7t/lBBgKRCMswnuC5MWfCxJeFqSSgCHaWNw1S0fo7TQupKLCi104D37uAaM4k7VpsvQNZczlY4lRa2aHyyyTj+wCyULIOvCOKMlD5mErf++pCifO+28hu+yWgtsgudMhgHua2L52xRY9YOFGPa5K36tqdRR/tq2wN54iE1Q0bosPHGlHb7rnFrLQZ3X;3:mbWialCH0ycnt7GncJabme/DduyI7Tl7VZOOg3wHn6dC4hLmoLegm1PWXrsWN/toMRrk3WepL9G5DUtL305wAYkVCjBw/bHC6QRi/zp6n3ZxyyBNCrMBM/Lm6LoXAfvw;25:69RJvQf69ZT/7lP79dGqY37aNjM9bH1zbHr6un8zFk1qeUD8j6A53rZzjmM3T4hgghfW/pLEPFYD+T0tkaFHlAOYaDCDBJFOGSKLjHJgSd5H6x12dWIN/lB0IGVjjxiKfSy5Jnz5s4UtZXoni4GY7PyWlwdzEo6YdtFECOpwZ6Q6MSvNNKTYicU8dQUP+y5v5MmqRPLIDc78SMjKoCobBC25wbo0ePM6hIT0cV2H8lYIzhAG6cMstGdHvoNJ03y41qjxsYsQuJUamLz/Q1AQicppKwFfVekMPcgywbZJ44rgA0UwXY2lGeoYVy5ciB68AWl9hg/3OnLOOMeiCZPV5YLUOxHqvFTo8Msw3W/L7Y7aOYKE43vxZmr21lipzlLqKYANQY+6kUTNUzT5MkemazrTNgpOr7mcjzqY/HM4bR4=;20:MPQiYLqXSUZhNAAPdiqE5AcEsjDhDfadaa/8GXLpOE7UvWUZ5gI6n/jbZeZ49vW5KXfKvMS6e+W8A/fqNZqzbgsIgVC5WMaU52AmfjhjC6zKCFdYisOZcPfaCtDBq/JMLVF6E+7eZTtrF84PmjduijvcSLdPjtDnjJlN4/Ab5K8= X-Microsoft-Antispam: UriScan:;BCL:0;PCL:0;RULEID:;SRVR:HE1PR08MB0505; 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charset=WINDOWS-1252 Content-Transfer-Encoding: 8BIT Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Apr 27, 2016 at 02:53:02PM -0400, David Long wrote: > From: Sandeepa Prabhu > > Kprobes needs simulation of instructions that cannot be stepped > from a different memory location, e.g.: those instructions > that uses PC-relative addressing. In simulation, the behaviour > of the instruction is implemented using a copy of pt_regs. > > The following instruction categories are simulated: > - All branching instructions(conditional, register, and immediate) > - Literal access instructions(load-literal, adr/adrp) > > Conditional execution is limited to branching instructions in > ARM v8. If conditions at PSTATE do not match the condition fields > of opcode, the instruction is effectively NOP. > > Thanks to Will Cohen for assorted suggested changes. > > Signed-off-by: Sandeepa Prabhu > Signed-off-by: William Cohen > Signed-off-by: David A. Long > --- > arch/arm64/include/asm/insn.h | 1 + > arch/arm64/include/asm/probes.h | 5 +- > arch/arm64/kernel/Makefile | 3 +- > arch/arm64/kernel/insn.c | 1 + > arch/arm64/kernel/kprobes-arm64.c | 29 ++++ > arch/arm64/kernel/kprobes.c | 32 ++++- > arch/arm64/kernel/probes-simulate-insn.c | 218 +++++++++++++++++++++++++++++++ > arch/arm64/kernel/probes-simulate-insn.h | 28 ++++ > 8 files changed, 311 insertions(+), 6 deletions(-) > create mode 100644 arch/arm64/kernel/probes-simulate-insn.c > create mode 100644 arch/arm64/kernel/probes-simulate-insn.h > > diff --git a/arch/arm64/include/asm/insn.h b/arch/arm64/include/asm/insn.h > index b9567a1..26cee10 100644 > --- a/arch/arm64/include/asm/insn.h > +++ b/arch/arm64/include/asm/insn.h > @@ -410,6 +410,7 @@ u32 aarch32_insn_mcr_extract_crm(u32 insn); > > typedef bool (pstate_check_t)(unsigned long); > extern pstate_check_t * const opcode_condition_checks[16]; > + > #endif /* __ASSEMBLY__ */ > > #endif /* __ASM_INSN_H */ > diff --git a/arch/arm64/include/asm/probes.h b/arch/arm64/include/asm/probes.h > index c5fcbe6..d524f7d 100644 > --- a/arch/arm64/include/asm/probes.h > +++ b/arch/arm64/include/asm/probes.h > @@ -15,11 +15,12 @@ > #ifndef _ARM_PROBES_H > #define _ARM_PROBES_H > > +#include > + > struct kprobe; > struct arch_specific_insn; > > typedef u32 kprobe_opcode_t; > -typedef unsigned long (kprobes_pstate_check_t)(unsigned long); > typedef void (kprobes_handler_t) (u32 opcode, long addr, struct pt_regs *); > > enum pc_restore_type { > @@ -35,7 +36,7 @@ struct kprobe_pc_restore { > /* architecture specific copy of original instruction */ > struct arch_specific_insn { > kprobe_opcode_t *insn; > - kprobes_pstate_check_t *pstate_cc; > + pstate_check_t *pstate_cc; > kprobes_handler_t *handler; > /* restore address after step xol */ > struct kprobe_pc_restore restore; > diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile > index 8816de2..43bf6cc 100644 > --- a/arch/arm64/kernel/Makefile > +++ b/arch/arm64/kernel/Makefile > @@ -37,7 +37,8 @@ arm64-obj-$(CONFIG_CPU_PM) += sleep.o suspend.o > arm64-obj-$(CONFIG_CPU_IDLE) += cpuidle.o > arm64-obj-$(CONFIG_JUMP_LABEL) += jump_label.o > arm64-obj-$(CONFIG_KGDB) += kgdb.o > -arm64-obj-$(CONFIG_KPROBES) += kprobes.o kprobes-arm64.o > +arm64-obj-$(CONFIG_KPROBES) += kprobes.o kprobes-arm64.o \ > + probes-simulate-insn.o > arm64-obj-$(CONFIG_EFI) += efi.o efi-entry.stub.o > arm64-obj-$(CONFIG_PCI) += pci.o > arm64-obj-$(CONFIG_ARMV8_DEPRECATED) += armv8_deprecated.o > diff --git a/arch/arm64/kernel/insn.c b/arch/arm64/kernel/insn.c > index f79e72e..bb2738c 100644 > --- a/arch/arm64/kernel/insn.c > +++ b/arch/arm64/kernel/insn.c > @@ -30,6 +30,7 @@ > #include > #include > #include > +#include > #include > > #define AARCH64_INSN_SF_BIT BIT(31) > diff --git a/arch/arm64/kernel/kprobes-arm64.c b/arch/arm64/kernel/kprobes-arm64.c > index e07727a..487238a 100644 > --- a/arch/arm64/kernel/kprobes-arm64.c > +++ b/arch/arm64/kernel/kprobes-arm64.c > @@ -21,6 +21,7 @@ > #include > > #include "kprobes-arm64.h" > +#include "probes-simulate-insn.h" > > static bool __kprobes aarch64_insn_is_steppable(u32 insn) > { > @@ -62,8 +63,36 @@ arm_probe_decode_insn(kprobe_opcode_t insn, struct arch_specific_insn *asi) > */ > if (aarch64_insn_is_steppable(insn)) > return INSN_GOOD; > + > + if (aarch64_insn_is_bcond(insn)) { > + asi->handler = simulate_b_cond; > + } else if (aarch64_insn_is_cbz(insn) || > + aarch64_insn_is_cbnz(insn)) { > + asi->handler = simulate_cbz_cbnz; > + } else if (aarch64_insn_is_tbz(insn) || > + aarch64_insn_is_tbnz(insn)) { > + asi->handler = simulate_tbz_tbnz; > + } else if (aarch64_insn_is_adr_adrp(insn)) > + asi->handler = simulate_adr_adrp; > + else if (aarch64_insn_is_b(insn) || > + aarch64_insn_is_bl(insn)) > + asi->handler = simulate_b_bl; For the same codingstyle, we'd better add more "{}" here and below. thanks Huang Shijie > + else if (aarch64_insn_is_br(insn) || > + aarch64_insn_is_blr(insn) || > + aarch64_insn_is_ret(insn)) > + asi->handler = simulate_br_blr_ret; > + else if (aarch64_insn_is_ldr_lit(insn)) > + asi->handler = simulate_ldr_literal; > + else if (aarch64_insn_is_ldrsw_lit(insn)) > + asi->handler = simulate_ldrsw_literal; > else > + /* > + * Instruction cannot be stepped out-of-line and we don't > + * (yet) simulate it. > + */ > return INSN_REJECTED; > + > + return INSN_GOOD_NO_SLOT; > }