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From: Darren Hart <dvhart@infradead.org>
To: Rajneesh Bhardwaj <rajneesh.bhardwaj@intel.com>
Cc: platform-driver-x86@vger.kernel.org,
	andriy.shevchenko@linux.intel.com, linux-kernel@vger.kernel.org,
	olof@lixom.net, tglx@linutronix.de, hpa@zytor.com,
	dbasehore@google.com, vishwanath.somayaji@intel.com
Subject: Re: [PATCH v6] platform:x86: Add PMC Driver for Intel Core SoC
Date: Wed, 25 May 2016 13:13:53 -0700	[thread overview]
Message-ID: <20160525201353.GA109010@f23x64.localdomain> (raw)
In-Reply-To: <1464198292-32356-1-git-send-email-rajneesh.bhardwaj@intel.com>

On Wed, May 25, 2016 at 11:14:52PM +0530, Rajneesh Bhardwaj wrote:
> This patch adds the Power Management Controller driver as a PCI driver
> for Intel Core SoC architecture.
> 
> This driver can utilize debugging capabilities and supported features
> as exposed by the Power Management Controller.
> 
> Please refer to the below specification for more details on PMC features.
> http://www.intel.in/content/www/in/en/chipsets/100-series-chipset-datasheet-vol-2.html
> 
> The current version of this driver exposes SLP_S0_RESIDENCY counter.
> This counter can be used for detecting fragile SLP_S0 signal related
> failures and take corrective actions when PCH SLP_S0 signal is not
> asserted after kernel freeze as part of suspend to idle flow
> (echo freeze > /sys/power/state).
> 
> Intel Platform Controller Hub (PCH) asserts SLP_S0 signal when it
> detects favorable conditions to enter its low power mode. As a
> pre-requisite the SoC should be in deepest possible Package C-State
> and devices should be in low power mode. For example, on Skylake SoC
> the deepest Package C-State is Package C10 or PC10. Suspend to idle
> flow generally leads to PC10 state but PC10 state may not be sufficient
> for realizing the platform wide power potential which SLP_S0 signal
> assertion can provide.
> 
> SLP_S0 signal is often connected to the Embedded Controller (EC) and the
> Power Management IC (PMIC) for other platform power management related
> optimizations.
> 
> In general, SLP_S0 assertion == PC10 + PCH low power mode + ModPhy Lanes
> power gated + PLL Idle.
> 
> As part of this driver, a mechanism to read the SLP_S0_RESIDENCY is exposed
> as an API and also debugfs features are added to indicate SLP_S0 signal
> assertion residency in microseconds.
> 
> echo freeze > /sys/power/state
> wake the system
> cat /sys/kernel/debug/pmc_core/slp_s0_residency_usec
> 
> Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@intel.com>
> Signed-off-by: Vishwanath Somayaji <vishwanath.somayaji@intel.com>

Hi Rajneesh,

Unfortunately during my build test, this introduced a new warning to the build:

drivers/platform/x86/intel_pmc_core.c:201:19: warning: ‘intel_pmc_core_init’
defined but not used [-Wunused-function]
 static int __init intel_pmc_core_init(void)

After the removal of the module stuff, the driver needed a device_initcall, or
the macro equivalent, consider:

$ git diff
diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel_pmc_core.c
index c834281..f6a29b9 100644
--- a/drivers/platform/x86/intel_pmc_core.c
+++ b/drivers/platform/x86/intel_pmc_core.c
@@ -198,7 +198,4 @@ static struct pci_driver intel_pmc_core_driver = {
        .remove = NULL, /* not a hot-plug capable driver */
 };

-static int __init intel_pmc_core_init(void)
-{
-       return pci_register_driver(&intel_pmc_core_driver);
-}
+builtin_pci_driver(intel_pmc_core_driver);

-- 
Darren Hart
Intel Open Source Technology Center

  reply	other threads:[~2016-05-25 20:13 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-05-25 17:44 Rajneesh Bhardwaj
2016-05-25 20:13 ` Darren Hart [this message]
2016-05-25 20:37   ` Andy Shevchenko
2016-05-25 21:04     ` Darren Hart

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