From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933545AbcE3QZK (ORCPT ); Mon, 30 May 2016 12:25:10 -0400 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:10703 "EHLO mx0a-001b2d01.pphosted.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933000AbcE3QZI (ORCPT ); Mon, 30 May 2016 12:25:08 -0400 Message-Id: <201605301625.u4UGOGxK039753@mx0a-001b2d01.pphosted.com> X-IBM-Helo: d23dlp03.au.ibm.com X-IBM-MailFrom: shreyas@linux.vnet.ibm.com X-IBM-RcptTo: linux-kernel@vger.kernel.org Date: Mon, 30 May 2016 21:54:04 +0530 From: Shreyas B Prabhu User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.1.0 MIME-Version: 1.0 To: Ram Pai CC: mpe@ellerman.id.au, ego@linux.vnet.ibm.com, mikey@neuling.org, maddy@linux.vnet.ibm.com, linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Subject: Re: [PATCH v4 08/10] powerpc/powernv: Add platform support for stop instruction References: <1464095714-48772-1-git-send-email-shreyas@linux.vnet.ibm.com> <1464095714-48772-9-git-send-email-shreyas@linux.vnet.ibm.com> <20160528000646.GA5658@ram.oc3035372033.ibm.com> In-Reply-To: <20160528000646.GA5658@ram.oc3035372033.ibm.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 16053016-0016-0000-0000-0000019FCC9E X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 16053016-0017-0000-0000-000004BB1D05 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2016-05-30_08:,, signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=8 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1604210000 definitions=main-1605300198 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Ram, On 05/28/2016 05:36 AM, Ram Pai wrote: > On Tue, May 24, 2016 at 06:45:12PM +0530, Shreyas B. Prabhu wrote: [snip] >> @@ -230,11 +236,18 @@ static DEVICE_ATTR(fastsleep_workaround_applyonce, 0600, >> show_fastsleep_workaround_applyonce, >> store_fastsleep_workaround_applyonce); >> >> +/* >> + * First deep stop state. Used to figure out when to save/restore >> + * hypervisor context. >> + */ >> +u64 pnv_first_deep_stop_state; > > maybe this has to be intialized to some correct default value? > > It there a gaurantee that OPAL_PM_STOP_INST_FAST is set only when > CPU_FTR_ARCH_300 is supported? > Stop instruction is newly introduced in POWER ISA v3.0. So it is guaranteed that OPAL_PM_STOP_INST_FAST is set only when CPU_FTR_ARCH_300 is supported. So the scenario you've described below will not arise. > if cpu_has_feature(CPU_FTR_ARCH_300) is not true, than > pnv_first_deep_stop_state will be not be initialized. > > And if supported_cpuidle_states > has OPAL_PM_STOP_INST_FAST flag set, than power_stop0 is called which > will blindly use pnv_first_deep_stop_state thinking it is initialized to > something sane. > Thanks, Shreyas