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Date: Thu, 02 Jun 2016 12:24:51 -0700 (PDT)
Message-Id: <20160602.122451.160749876120675817.davem@davemloft.net>
To: qiang.zhao@nxp.com
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        xiaobo.xie@nxp.com
Subject: Re: [PATCH v2 2/5] fsl/qe: setup clock source for TDM mode
From: David Miller <davem@davemloft.net>
In-Reply-To: <1464831901-15913-2-git-send-email-qiang.zhao@nxp.com>
References: <1464831901-15913-1-git-send-email-qiang.zhao@nxp.com>
	<1464831901-15913-2-git-send-email-qiang.zhao@nxp.com>
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From: Zhao Qiang <qiang.zhao@nxp.com>
Date: Thu, 2 Jun 2016 09:44:58 +0800

> +static int ucc_get_tdm_sync_source(u32 tdm_num, enum qe_clock clock,
> +				   enum comm_dir mode)
> +{
> +	int source = -EINVAL;
> +
> +	if (mode == COMM_DIR_RX && clock == QE_RSYNC_PIN) {
> +		source = 0;
> +		return source;
> +	}
> +	if (mode == COMM_DIR_TX && clock == QE_TSYNC_PIN) {
> +		source = 0;
> +		return source;
> +	}
> +
> +	switch (tdm_num) {
> +	case 0:
> +	case 1:
> +		switch (clock) {
> +		case QE_BRG9:
> +				source = 1;
> +				break;
> +		case QE_BRG10:
> +				source = 2;
> +				break;

These switch case bodies are over indented.  Same goes for the rest of
this function.