From: "Lennart Sorensen" <lsorense@csclub.uwaterloo.ca>
To: Sebastian Frias <sf84@laposte.net>
Cc: "Thomas Gleixner" <tglx@linutronix.de>,
"Marc Zyngier" <marc.zyngier@arm.com>,
LKML <linux-kernel@vger.kernel.org>,
"Grygorii Strashko" <grygorii.strashko@ti.com>,
"Sricharan R" <r.sricharan@ti.com>, Mason <slash.tmp@free.fr>,
"Måns Rullgård" <mans@mansr.com>
Subject: Re: Using irq-crossbar.c
Date: Fri, 10 Jun 2016 12:06:21 -0400 [thread overview]
Message-ID: <20160610160621.GA5829@csclub.uwaterloo.ca> (raw)
In-Reply-To: <575ADEBA.2030202@laposte.net>
On Fri, Jun 10, 2016 at 05:37:30PM +0200, Sebastian Frias wrote:
> We are trying to write a driver for an interrupt controller (actually more of a crossbar) for an ARM-based SoC.
> This IRQ crossbar has 128 inputs and 24 outputs, the outputs are connected directly to the GIC.
> The idea is that the GIC handles everything, and just request a mapping from an IRQ number (0...127, from a device's DT entry) into one of its 24 input lines.
>
> By looking at current code (4.7-rc1) there seems to be a driver (drivers/irqchip/irq-crossbar.c) that provides similar functionality.
> The driver uses hierarchical irq domains (since commit 783d31863fb8 "irqchip: crossbar: Convert dra7 crossbar to stacked domains") which we believe we don't need because the only controller is the GIC.
> However the API used previously, register_routable_domain_ops(), was removed with commit a5561c3e845c "irqchip: gic: Get rid of routable domain".
>
> Trying to use the driver with hierarchical domains (after modifications for our SoC), results on the kernel being blocked at some point:
>
> [ 0.041524] ThumbEE CPU extension supported.
> [ 0.041589] Registering SWP/SWPB emulation handler
> [ 0.052022] Freeing unused kernel memory: 12364K (c029b000 - c0eae000)
> [ 0.074084] random: dbus-uuidgen urandom read with 0 bits of entropy available
>
> We've put logs on the different domain_ops calls (alloc, free, translate) but they are not called, even if the DT is supposed to tell devices to take interrupts from this controller (*).
>
> Do you have suggestions on what APIs should be used, further reading/examples and/or pointers on how debug this (logs to enable, things to look for, etc.)?
Well irq-crossbar.c seems to be very specific to the crossbar in TI chips
which handle lots of inputs and lots of outputs to multiple receivers
(not just the GIC) as far as I have understood it.
Also, unless you modified the IRQCHIP_DECLARE at the end, I see nothing
in your dtb that would match the driver at all.
And even if that did match, is your crossbar at all register compatible
with the TI design?
irq-crossbar might be a good example for how to write such a driver,
but I wouldn't have much hope of it being useful as a generic driver,
never mind the unfortunate name the source file has. I suspect
ti-irq-crossbar.c would have been much more appropriate.
--
Len Soremsem
prev parent reply other threads:[~2016-06-10 16:14 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-10 15:37 Sebastian Frias
2016-06-10 16:05 ` Marc Zyngier
2016-06-10 19:36 ` Mason
2016-06-11 9:58 ` Marc Zyngier
2016-06-11 15:37 ` Mason
2016-06-12 10:00 ` Marc Zyngier
2016-06-12 13:50 ` Mason
2016-06-13 7:58 ` Marc Zyngier
2016-06-13 14:04 ` Lennart Sorensen
2016-06-13 14:57 ` Sebastian Frias
2016-06-13 15:42 ` Lennart Sorensen
2016-06-13 15:49 ` Mason
2016-06-13 15:57 ` Marc Zyngier
2016-06-13 17:55 ` Lennart Sorensen
2016-06-13 15:15 ` Sebastian Frias
2016-06-13 16:26 ` Marc Zyngier
2016-06-13 15:46 ` Sebastian Frias
2016-06-13 16:24 ` Marc Zyngier
2016-06-14 16:37 ` Sebastian Frias
2016-06-14 16:39 ` Sebastian Frias
2016-06-16 12:39 ` Sebastian Frias
2016-06-21 10:18 ` Marc Zyngier
2016-06-21 11:03 ` Sebastian Frias
2016-06-21 12:41 ` Marc Zyngier
2016-06-21 15:29 ` Sebastian Frias
2016-06-13 17:59 ` Lennart Sorensen
2016-06-10 16:06 ` Lennart Sorensen [this message]
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