From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752326AbcFTFmU (ORCPT ); Mon, 20 Jun 2016 01:42:20 -0400 Received: from mailout4.samsung.com ([203.254.224.34]:42003 "EHLO mailout4.samsung.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750744AbcFTFmI (ORCPT ); Mon, 20 Jun 2016 01:42:08 -0400 X-AuditID: cbfee68d-f79876d000001436-11-57678225e8bd Date: Mon, 20 Jun 2016 14:41:57 +0900 From: Andi Shyti To: Tomasz Figa Cc: Andi Shyti , Chanwoo Choi , Sylwester Nawrocki , Michael Turquette , Stephen Boyd , Kukjin Kim , Krzysztof Kozlowski , "linux-samsung-soc@vger.kernel.org" , linux-clk@vger.kernel.org, linux-arm-kernel , linux-kernel , Jaehoon Chung , Andi Shyti Subject: Re: [PATCH] clk: samsung: exynos5433: use clock_ignore_unused flag for SPI3 related clocks Message-id: <20160620054157.GA6498@samsunx.samsung> References: <1466151362-2881-1-git-send-email-andi.shyti@samsung.com> <20160619055921.GA424@jack.zhora.eu> MIME-version: 1.0 Content-type: text/plain; charset=us-ascii Content-disposition: inline In-reply-to: User-Agent: Mutt/1.6.0 (2016-04-01) X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrIIsWRmVeSWpSXmKPExsWyRsSkUFe1KT3c4Pp0S4vtR56xWiz+8ZzJ 4vqX56wWN361sVq8fmFo0f/4NbPFpsfXWC0+9txjtbi8aw6bxYzz+5gsLp5ytTj8pp3V4seZ bhaLVbv+MDrweby/0crucbmvl8nj+pJPzB47Z91l99i0qpPNY/OSeo++LasYPT5vkgvgiOKy SUnNySxLLdK3S+DKuHG+j6ngIXfFk0db2BoYz3F0MXJwSAiYSFw5Y9vFyAlkiklcuLeerYuR i0NIYAWjxO7+5SwQCROJI6fPsYLYQgKzGCW+bxGFKPrIKLG3aT4TSIJFQFXi1/m9YA1sApoS Tbd/sIHYIgLqEt+m9LODNDAL7GWR2HLnDztIQlggVeLD9V3sIFfwChhLLP5VCTH0HJPEmubp jCA1vAKCEj8m3wMbyiygJbF+53EmCFta4tHfGWBzOAWCJb6fBDmCg0NUQFni7rIgkDkSAjM5 JJYt/Ap1nIDEt8mHWCA+lpXYdIAZ4jFJiYMrbrBMYBSbhWTbLCTbZiHZtoCReRWjaGpBckFx UnqRoV5xYm5xaV66XnJ+7iZGYEyf/vesdwfj7QPWhxgFOBiVeHgtzqaFC7EmlhVX5h5iNAW6 YiKzlGhyPjBx5JXEGxqbGVmYmpgaG5lbmimJ8ypK/QwWEkhPLEnNTk0tSC2KLyrNSS0+xMjE wSnVwLjcStiM+4G2tYbFqz86pzUUBBfqfWDN+znlWP2WeAfbBGHbj3IBHypbmEKagiMUD5h9 nHo7LWKfz0kxjzM3L4cEBKj8aD3Y2Pv0/61Ga9E85xzLqAOqBUsm7mEQ3HduQsy+mC7b8CrT jBr39bsvvzHx//Bfr1HY/67oOkGn0yEnXuwU3yhprsRSnJFoqMVcVJwIAHifSv3kAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprPKsWRmVeSWpSXmKPExsVy+t9jQV3VpvRwg5c9xhbbjzxjtVj84zmT xfUvz1ktbvxqY7V4/cLQov/xa2aLTY+vsVp87LnHanF51xw2ixnn9zFZXDzlanH4TTurxY8z 3SwWq3b9YXTg83h/o5Xd43JfL5PH9SWfmD12zrrL7rFpVSebx+Yl9R59W1YxenzeJBfAEdXA aJORmpiSWqSQmpecn5KZl26r5B0c7xxvamZgqGtoaWGupJCXmJtqq+TiE6DrlpkDdLaSQlli TilQKCCxuFhJ3w7ThNAQN10LmMYIXd+QILgeIwM0kLCGMePG+T6mgofcFU8ebWFrYDzH0cXI ySEhYCJx5PQ5VghbTOLCvfVsILaQwCxGie9bRLsYuYDsj4wSe5vmM4EkWARUJX6d38sCYrMJ aEo03f4B1iAioC7xbUo/O0gDs8BeFoktd/6wgySEBVIlPlzfBWRzcPAKGEss/lUJMfQck8Sa 5umMIDW8AoISPybfAxvKLKAlsX7ncSYIW1ri0d8ZYHM4BYIlvp8EOYKDQ1RAWeLusqAJjEBX InTPQtI9C0n3AkbmVYwSqQXJBcVJ6blGeanlesWJucWleel6yfm5mxjBieOZ9A7Gw7vcDzEK cDAq8fDOUEwPF2JNLCuuzD3EKMHBrCTC29YAFOJNSaysSi3Kjy8qzUktPsRoCgyQicxSosn5 wKSWVxJvaGxiZmRpZG5oYWRsriTO+/j/ujAhgfTEktTs1NSC1CKYPiYOTqkGRmtTl3/T3h9I XHr+T8Bt851u4iYsLLnzf3D1mlubvdaq9ZC7wRCycmJfZbeTiETH3GgR369BTIHn6icd3t2/ xE/SXurj5BMeCnPeCmt+OL61ejNv29y7duZzskU/mXltdHzF8zUm8TD3Lf35H5df2zvTj+/C qjX6N8V/ligf1xdm3mu84abRPyWW4oxEQy3mouJEAKSlyxEyAwAA DLP-Filter: Pass X-MTR: 20000000000000000@CPGS X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Tomasz, > >> > The SPI 3 bus uses two clocks, a bus clock and an input clock. > >> > Do not disable the clocks when unused in order to allow access to > >> > the SPI 3 device. > >> > >> If unused, why would access to SPI 3 device needed? > > > > because next I will submit a small driver which uses the SPI3. > > Actually in the exynos5433 boards all the SPI are used but not all > > the drivers are ported to mainline. > > Then shouldn't the driver request the clocks and enable them? Or I'm > missing something obvious? :) the reason is that... [ from the patch ] > GATE(CLK_SCLK_IOCLK_SPI3, "sclk_ioclk_spi3", "ioclk_spi3_clk_in", > - ENABLE_SCLK_PERIC, 20, CLK_SET_RATE_PARENT, 0), > + ENABLE_SCLK_PERIC, 20, > + CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0), ... the sclk_ioclk_spi3 is new in exynos5433 and there is no implementation for enabling/disabling that particular clock... > GATE(CLK_SCLK_SPI3, "sclk_spi3", "sclk_spi3_peric", ENABLE_SCLK_PERIC, > - 18, CLK_SET_RATE_PARENT, 0), > + 18, CLK_IGNORE_UNUSED | CLK_SET_RATE_PARENT, 0), ... while in this case your question makes sense, but it depends on which clock the device (s3c64xx) is requesting (from the DTS). In any case, I kept it consistent with the SPI1, which falls in the same case, as in mainline we don't have any DTS for exynos5433 (yet!). Thanks, Andi