From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751951AbcFZFVi (ORCPT ); Sun, 26 Jun 2016 01:21:38 -0400 Received: from mail-pa0-f44.google.com ([209.85.220.44]:32878 "EHLO mail-pa0-f44.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751671AbcFZFVg (ORCPT ); Sun, 26 Jun 2016 01:21:36 -0400 From: Stephen Boyd To: Linus Walleij Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org Subject: [PATCH 0/2] Support HSIC "pins" on msm8974 tlmm Date: Sat, 25 Jun 2016 22:21:30 -0700 Message-Id: <20160626052132.7178-1-stephen.boyd@linaro.org> X-Mailer: git-send-email 2.9.0.rc2.8.ga28705d Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This is part of a larger patch series that adds support for the USB HSIC controller on msm8974 based SoCs. The first patch here is a minor fix for a problem that isn't happening yet but could happen in the future. The second patch adds an hsic pin so we can configure the hsic bits that live in the TLMM register space. Stephen Boyd (2): pinctrl: qcom: Clear all function selection bits pinctrl: qcom: msm8974: Add hsic_ctl pinmux .../bindings/pinctrl/qcom,msm8974-pinctrl.txt | 5 ++- drivers/pinctrl/qcom/pinctrl-msm.c | 6 ++- drivers/pinctrl/qcom/pinctrl-msm8x74.c | 43 +++++++++++++++++++++- 3 files changed, 50 insertions(+), 4 deletions(-) -- 2.9.0.rc2.8.ga28705d