From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752085AbcF0JE0 (ORCPT ); Mon, 27 Jun 2016 05:04:26 -0400 Received: from hqemgate14.nvidia.com ([216.228.121.143]:4543 "EHLO hqemgate14.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751852AbcF0JCr (ORCPT ); Mon, 27 Jun 2016 05:02:47 -0400 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Mon, 27 Jun 2016 02:01:47 -0700 From: Joseph Lo To: Stephen Warren , Thierry Reding , Alexandre Courbot CC: , , "Rob Herring" , Mark Rutland , "Peter De Schrijver" , Matthew Longnecker , , Jassi Brar , , Catalin Marinas , Will Deacon , Joseph Lo Subject: [PATCH 06/10] soc/tegra: Add Tegra186 support Date: Mon, 27 Jun 2016 17:02:44 +0800 Message-ID: <20160627090248.23621-7-josephl@nvidia.com> X-Mailer: git-send-email 2.9.0 In-Reply-To: <20160627090248.23621-1-josephl@nvidia.com> References: <20160627090248.23621-1-josephl@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The Tegra186 has a combination of Denver and Cortex-A57 CPU cores and GPUs with Pascal architecture on it. It features with ADSP with Cortex-A9 CPU for audio processing, hardware video encoder/decoder with multi-format support, ISP for image capture processing and BPMP for the power managements. Signed-off-by: Joseph Lo --- drivers/soc/tegra/Kconfig | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/soc/tegra/Kconfig b/drivers/soc/tegra/Kconfig index 03089ad2fc65..88a71dfd466c 100644 --- a/drivers/soc/tegra/Kconfig +++ b/drivers/soc/tegra/Kconfig @@ -61,6 +61,20 @@ config ARCH_TEGRA_132_SOC but contains an NVIDIA Denver CPU complex in place of Tegra124's "4+1" Cortex-A15 CPU complex. +config ARCH_TEGRA_186_SOC + bool "NVIDIA Tegra186 SoC" + select MAILBOX + select TEGRA_BPMP + select TEGRA_HSP_MBOX + select TEGRA_IVC + help + Enable support for the NVIDIA Tegar186 SoC. The Tegra186 has a + combination of Denver and Cortex-A57 CPU cores and GPUs with Pascal + architecture on it. It features with ADSP with Cortex-A9 CPU for + audio processing, hardware video encoder/decoder with multi-format + support, ISP for image capture processing and BPMP for the power + managements. + config ARCH_TEGRA_210_SOC bool "NVIDIA Tegra210 SoC" select PINCTRL_TEGRA210 -- 2.9.0