From: Andre Przywara <andre.przywara@arm.com>
To: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>
Cc: Suzuki K Poulose <Suzuki.Poulose@arm.com>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v2 3/6] arm64: include alternative handling in dcache_by_line_op
Date: Tue, 28 Jun 2016 18:07:29 +0100 [thread overview]
Message-ID: <20160628170732.523-4-andre.przywara@arm.com> (raw)
In-Reply-To: <20160628170732.523-1-andre.przywara@arm.com>
The newly introduced dcache_by_line_op macro is used at least in
one occassion at the moment to issue a "dc cvau" instruction,
which is affected by ARM errata 819472, 826319, 827319 and 824069.
Change the macro to allow for alternative patching in there to
protect affected Cortex-A53 cores.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm64/include/asm/assembler.h | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h
index 10b017c..1a021f1 100644
--- a/arch/arm64/include/asm/assembler.h
+++ b/arch/arm64/include/asm/assembler.h
@@ -24,6 +24,7 @@
#define __ASM_ASSEMBLER_H
#include <asm/asm-offsets.h>
+#include <asm/cpufeature.h>
#include <asm/page.h>
#include <asm/pgtable-hwdef.h>
#include <asm/ptrace.h>
@@ -261,7 +262,16 @@ lr .req x30 // link register
add \size, \kaddr, \size
sub \tmp2, \tmp1, #1
bic \kaddr, \kaddr, \tmp2
-9998: dc \op, \kaddr
+9998:
+ .if (\op == cvau || \op == cvac)
+ alternative_if_not ARM64_WORKAROUND_CLEAN_CACHE
+ dc \op, \kaddr
+ alternative_else
+ dc civac, \kaddr
+ alternative_endif
+ .else
+ dc \op, \kaddr
+ .endif
add \kaddr, \kaddr, \tmp1
cmp \kaddr, \size
b.lo 9998b
--
2.9.0
next prev parent reply other threads:[~2016-06-28 17:07 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-06-28 17:07 [PATCH v2 0/6] arm64: Extend Cortex-A53 errata workaround Andre Przywara
2016-06-28 17:07 ` [PATCH v2 1/6] Revert "arm64: alternatives: add enable parameter to conditional asm macros" Andre Przywara
2016-06-28 17:07 ` [PATCH v2 2/6] arm64: fix "dc cvau" cache operation on errata-affected core Andre Przywara
2016-06-28 17:07 ` Andre Przywara [this message]
2016-06-28 17:07 ` [PATCH v2 4/6] arm64: errata: Calling enable functions for CPU errata too Andre Przywara
2016-06-28 17:07 ` [PATCH v2 5/6] arm64: consolidate signal injection on emulation errors Andre Przywara
2016-06-28 17:07 ` [PATCH v2 6/6] arm64: trap userspace "dc cvau" cache operation on errata-affected core Andre Przywara
2016-07-01 10:53 ` [PATCH v2 0/6] arm64: Extend Cortex-A53 errata workaround Catalin Marinas
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