From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752686AbcF1VAY (ORCPT ); Tue, 28 Jun 2016 17:00:24 -0400 Received: from mail-qk0-f195.google.com ([209.85.220.195]:33517 "EHLO mail-qk0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753037AbcF1VAV (ORCPT ); Tue, 28 Jun 2016 17:00:21 -0400 Date: Tue, 28 Jun 2016 15:57:38 -0500 From: Rob Herring To: "Andrew F. Davis" Cc: Philipp Zabel , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Suman Anna , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v5 1/2] Documentation: dt: reset: Add TI syscon reset binding Message-ID: <20160628205738.GX3737@rob-hp-laptop> References: <20160627171217.4715-1-afd@ti.com> <20160627171217.4715-2-afd@ti.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20160627171217.4715-2-afd@ti.com> User-Agent: Mutt/1.5.24 (2015-08-30) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Jun 27, 2016 at 12:12:16PM -0500, Andrew F. Davis wrote: > Add TI syscon reset controller binding. This will hook to the reset > framework and use syscon/regmap to set reset bits. This allows reset > control of individual SoC subsytems and devices with memory-mapped > reset registers in a common register memory space. > > Signed-off-by: Andrew F. Davis > Signed-off-by: Suman Anna > --- > .../devicetree/bindings/reset/ti-syscon-reset.txt | 91 ++++++++++++++++++++++ > include/dt-bindings/reset/ti-syscon.h | 38 +++++++++ > 2 files changed, 129 insertions(+) > create mode 100644 Documentation/devicetree/bindings/reset/ti-syscon-reset.txt > create mode 100644 include/dt-bindings/reset/ti-syscon.h Acked-by: Rob Herring