From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752701AbcGALsi (ORCPT ); Fri, 1 Jul 2016 07:48:38 -0400 Received: from foss.arm.com ([217.140.101.70]:38366 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752201AbcGALsh (ORCPT ); Fri, 1 Jul 2016 07:48:37 -0400 Date: Fri, 1 Jul 2016 11:53:55 +0100 From: Catalin Marinas To: Andre Przywara Cc: Will Deacon , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Suzuki K Poulose Subject: Re: [PATCH v2 0/6] arm64: Extend Cortex-A53 errata workaround Message-ID: <20160701105355.GA14018@e104818-lin.cambridge.arm.com> References: <20160628170732.523-1-andre.przywara@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20160628170732.523-1-andre.przywara@arm.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jun 28, 2016 at 06:07:26PM +0100, Andre Przywara wrote: > Andre Przywara (6): > Revert "arm64: alternatives: add enable parameter to conditional asm > macros" > arm64: fix "dc cvau" cache operation on errata-affected core > arm64: include alternative handling in dcache_by_line_op > arm64: errata: Calling enable functions for CPU errata too > arm64: consolidate signal injection on emulation errors > arm64: trap userspace "dc cvau" cache operation on errata-affected > core Patches queued for 4.8. Thanks. -- Catalin