From: Joseph Lo <josephl@nvidia.com>
To: Stephen Warren <swarren@wwwdotorg.org>,
Thierry Reding <thierry.reding@gmail.com>,
Alexandre Courbot <gnurou@gmail.com>
Cc: <linux-tegra@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
"Rob Herring" <robh+dt@kernel.org>,
Mark Rutland <mark.rutland@arm.com>,
"Peter De Schrijver" <pdeschrijver@nvidia.com>,
Matthew Longnecker <MLongnecker@nvidia.com>,
<devicetree@vger.kernel.org>,
Jassi Brar <jassisinghbrar@gmail.com>,
<linux-kernel@vger.kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will.deacon@arm.com>, Joseph Lo <josephl@nvidia.com>
Subject: [PATCH V2 01/10] Documentation: dt-bindings: mailbox: tegra: Add binding for HSP mailbox
Date: Tue, 5 Jul 2016 17:04:22 +0800 [thread overview]
Message-ID: <20160705090431.5852-2-josephl@nvidia.com> (raw)
In-Reply-To: <20160705090431.5852-1-josephl@nvidia.com>
Add DT binding for the Hardware Synchronization Primitives (HSP). The
HSP is designed for the processors to share resources and communicate
together. It provides a set of hardware synchronization primitives for
interprocessor communication. So the interprocessor communication (IPC)
protocols can use hardware synchronization primitive, when operating
between two processors not in an SMP relationship.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
---
Changes in V2:
- revise the compatible string, interrupt-names, interrupts, and #mbox-cells
properties
- remove "nvidia,hsp-function" property
- fix the header file name
- the binding supports the concept of multiple HSP sub-modules on one HSP HW
block now.
---
.../bindings/mailbox/nvidia,tegra186-hsp.txt | 51 ++++++++++++++++++++++
include/dt-bindings/mailbox/tegra186-hsp.h | 23 ++++++++++
2 files changed, 74 insertions(+)
create mode 100644 Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.txt
create mode 100644 include/dt-bindings/mailbox/tegra186-hsp.h
diff --git a/Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.txt b/Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.txt
new file mode 100644
index 000000000000..10e53edbe1c7
--- /dev/null
+++ b/Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.txt
@@ -0,0 +1,51 @@
+NVIDIA Tegra Hardware Synchronization Primitives (HSP)
+
+The HSP modules are used for the processors to share resources and communicate
+together. It provides a set of hardware synchronization primitives for
+interprocessor communication. So the interprocessor communication (IPC)
+protocols can use hardware synchronization primitives, when operating between
+two processors not in an SMP relationship.
+
+The features that HSP supported are shared mailboxes, shared semaphores,
+arbitrated semaphores and doorbells.
+
+Required properties:
+- name : Should be hsp
+- compatible
+ Array of strings.
+ one of:
+ - "nvidia,tegra186-hsp"
+- reg : Offset and length of the register set for the device.
+- interrupt-names
+ Array of strings.
+ Contains a list of names for the interrupts described by the interrupt
+ property. May contain the following entries, in any order:
+ - "doorbell"
+ Users of this binding MUST look up entries in the interrupt property
+ by name, using this interrupt-names property to do so.
+- interrupts
+ Array of interrupt specifiers.
+ Must contain one entry per entry in the interrupt-names property,
+ in a matching order.
+- #mbox-cells : Should be 1.
+
+The mbox specifier of the "mboxes" property in the client node should use
+the "HSP_MBOX_ID" macro which integrates the HSP type and master ID data.
+Those information can be found in the following file.
+
+- <dt-bindings/mailbox/tegra186-hsp.h>.
+
+Example:
+
+hsp_top0: hsp@3c00000 {
+ compatible = "nvidia,tegra186-hsp";
+ reg = <0x0 0x03c00000 0x0 0xa0000>;
+ interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "doorbell";
+ #mbox-cells = <1>;
+};
+
+client {
+ ...
+ mboxes = <&hsp_top0 HSP_MBOX_ID(DB, HSP_DB_MASTER_XXX)>;
+};
diff --git a/include/dt-bindings/mailbox/tegra186-hsp.h b/include/dt-bindings/mailbox/tegra186-hsp.h
new file mode 100644
index 000000000000..365dbeb5d894
--- /dev/null
+++ b/include/dt-bindings/mailbox/tegra186-hsp.h
@@ -0,0 +1,23 @@
+/*
+ * This header provides constants for binding nvidia,tegra186-hsp.
+ *
+ * The number with HSP_DB_MASTER prefix indicates the bit that is
+ * associated with a master ID in the doorbell registers.
+ */
+
+
+#ifndef _DT_BINDINGS_MAILBOX_TEGRA186_HSP_H
+#define _DT_BINDINGS_MAILBOX_TEGRA186_HSP_H
+
+#define HSP_MBOX_TYPE_DB 0x0
+#define HSP_MBOX_TYPE_SM 0x1
+#define HSP_MBOX_TYPE_SS 0x2
+#define HSP_MBOX_TYPE_AS 0x3
+
+#define HSP_DB_MASTER_CCPLEX 17
+#define HSP_DB_MASTER_BPMP 19
+
+#define HSP_MBOX_ID(type, ID) \
+ (HSP_MBOX_TYPE_##type << 16 | ID)
+
+#endif /* _DT_BINDINGS_MAILBOX_TEGRA186_HSP_H */
--
2.9.0
next prev parent reply other threads:[~2016-07-05 9:05 UTC|newest]
Thread overview: 51+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-07-05 9:04 [PATCH V2 00/10] arm64: tegra: add BPMP support Joseph Lo
2016-07-05 9:04 ` Joseph Lo [this message]
2016-07-06 17:02 ` [PATCH V2 01/10] Documentation: dt-bindings: mailbox: tegra: Add binding for HSP mailbox Stephen Warren
2016-07-07 6:24 ` Joseph Lo
2016-07-07 18:13 ` Sivaram Nair
2016-07-07 18:35 ` Stephen Warren
2016-07-07 18:44 ` Sivaram Nair
2016-07-11 14:14 ` Rob Herring
2016-07-11 16:08 ` Stephen Warren
2016-07-18 23:13 ` Stephen Warren
2016-07-19 7:09 ` Joseph Lo
2016-07-05 9:04 ` [PATCH V2 02/10] mailbox: tegra-hsp: Add HSP(Hardware Synchronization Primitives) driver Joseph Lo
2016-07-06 7:05 ` Alexandre Courbot
2016-07-06 9:06 ` Joseph Lo
2016-07-06 12:23 ` Alexandre Courbot
2016-07-07 6:37 ` Joseph Lo
2016-07-07 21:33 ` Sivaram Nair
2016-07-18 8:58 ` Joseph Lo
2016-07-06 16:50 ` Stephen Warren
2016-07-07 6:49 ` Joseph Lo
2016-07-07 21:10 ` Sivaram Nair
2016-07-18 8:51 ` Joseph Lo
2016-07-05 9:04 ` [PATCH V2 03/10] Documentation: dt-bindings: firmware: tegra: add bindings of the BPMP Joseph Lo
2016-07-06 11:42 ` Alexandre Courbot
2016-07-07 6:25 ` Joseph Lo
2016-07-06 17:03 ` Stephen Warren
2016-07-07 6:26 ` Joseph Lo
2016-07-11 14:22 ` Rob Herring
2016-07-11 16:05 ` Stephen Warren
2016-07-18 7:44 ` Joseph Lo
2016-07-18 16:18 ` Stephen Warren
2016-07-13 19:41 ` Stephen Warren
2016-07-18 6:42 ` Joseph Lo
2016-07-05 9:04 ` [PATCH V2 04/10] firmware: tegra: add IVC library Joseph Lo
2016-07-07 11:16 ` Alexandre Courbot
2016-07-09 23:45 ` Paul Gortmaker
2016-07-05 9:04 ` [PATCH V2 05/10] firmware: tegra: add BPMP support Joseph Lo
2016-07-06 11:39 ` Alexandre Courbot
2016-07-06 16:39 ` Stephen Warren
2016-07-06 16:47 ` Matt Longnecker
2016-07-07 2:24 ` Alexandre Courbot
2016-07-07 8:17 ` Joseph Lo
2016-07-07 10:18 ` Alexandre Courbot
2016-07-07 19:55 ` Stephen Warren
2016-07-08 20:19 ` Sivaram Nair
2016-07-08 17:55 ` Sivaram Nair
2016-07-05 9:04 ` [PATCH V2 06/10] soc/tegra: Add Tegra186 support Joseph Lo
2016-07-05 9:04 ` [PATCH V2 07/10] arm64: defconfig: Enable Tegra186 SoC Joseph Lo
2016-07-05 9:04 ` [PATCH V2 08/10] arm64: dts: tegra: Add Tegra186 support Joseph Lo
2016-07-05 9:04 ` [PATCH V2 09/10] arm64: dts: tegra: Add NVIDIA Tegra186 P3310 main board support Joseph Lo
2016-07-05 9:04 ` [PATCH V2 10/10] arm64: dts: tegra: Add NVIDIA P2771 " Joseph Lo
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