From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932778AbcGHRdi (ORCPT ); Fri, 8 Jul 2016 13:33:38 -0400 Received: from mga11.intel.com ([192.55.52.93]:39820 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755815AbcGHRda (ORCPT ); Fri, 8 Jul 2016 13:33:30 -0400 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.28,331,1464678000"; d="scan'208";a="731518295" Date: Fri, 8 Jul 2016 10:29:03 -0700 From: yunhong jiang To: Paolo Bonzini Cc: linux-kernel@vger.kernel.org, kvm@vger.kernel.org, Wanpeng Li , Radim =?UTF-8?B?S3LEjW3DocWZ?= , Yunhong Jiang , Jan Kiszka , Haozhong Zhang Subject: Re: [RFT PATCH v5 3/3] KVM: nVMX: keep preemption timer enabled during L2 execution Message-ID: <20160708102903.48b0421a@jnakajim-build> In-Reply-To: <1467979333-19535-4-git-send-email-pbonzini@redhat.com> References: <1467979333-19535-1-git-send-email-pbonzini@redhat.com> <1467979333-19535-4-git-send-email-pbonzini@redhat.com> Organization: otc X-Mailer: Claws Mail 3.11.1 (GTK+ 2.24.28; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 8 Jul 2016 14:02:13 +0200 Paolo Bonzini wrote: > Because the vmcs12 preemption timer is emulated through a separate > hrtimer, we can keep on using the preemption timer in the vmcs02 to > emulare L1's TSC deadline timer. > > However, the corresponding bit in the pin-based execution control > field must be kept consistent between vmcs01 and vmcs02. On vmentry > we copy it into the vmcs02; on vmexit the preemption timer must be > disabled in the vmcs01 if a preemption timer vmexit happened while in > guest mode. > > The preemption timer value in the vmcs02 is set by vmx_vcpu_run, so it > need not be considered in prepare_vmcs02. > > Signed-off-by: Paolo Bonzini > --- > arch/x86/kvm/vmx.c | 15 +++++++++++++-- > 1 file changed, 13 insertions(+), 2 deletions(-) > > diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c > index 0048be79c7b9..8cda4449a60e 100644 > --- a/arch/x86/kvm/vmx.c > +++ b/arch/x86/kvm/vmx.c > @@ -9796,9 +9796,14 @@ static void prepare_vmcs02(struct kvm_vcpu > *vcpu, struct vmcs12 *vmcs12) vmcs_write64(VMCS_LINK_POINTER, -1ull); > > exec_control = vmcs12->pin_based_vm_exec_control; > - exec_control |= vmcs_config.pin_based_exec_ctrl; > + > + /* Preemption timer setting is only taken from vmcs01. */ > exec_control &= ~PIN_BASED_VMX_PREEMPTION_TIMER; Do we still keep this clear here with followed changes? > + exec_control |= vmcs_config.pin_based_exec_ctrl; > + if (vmx->hv_deadline_tsc == -1) > + exec_control &= ~PIN_BASED_VMX_PREEMPTION_TIMER; > > + /* Posted interrupts setting is only taken from vmcs12. */ > if (nested_cpu_has_posted_intr(vmcs12)) { > /* > * Note that we use L0's vector here and in > @@ -10727,8 +10732,14 @@ static void nested_vmx_vmexit(struct > kvm_vcpu *vcpu, u32 exit_reason, > load_vmcs12_host_state(vcpu, vmcs12); > > - /* Update TSC_OFFSET if TSC was changed while L2 ran */ > + /* Update any VMCS fields that might have changed while L2 > ran */ vmcs_write64(TSC_OFFSET, vmx->nested.vmcs01_tsc_offset); > + if (vmx->hv_deadline_tsc == -1) > + vmcs_clear_bits(PIN_BASED_VM_EXEC_CONTROL, > + PIN_BASED_VMX_PREEMPTION_TIMER); > + else > + vmcs_set_bits(PIN_BASED_VM_EXEC_CONTROL, > + PIN_BASED_VMX_PREEMPTION_TIMER); Why do we need change the vmcs01 here? Per my understanding, the vmcs01 is not changed when the L2 guest is running thus the PIN_BASED_VM_EXEC_CONTROL should not be changed? I'm not familiar with nested VMX, sorry if this is a naive question. Thanks --jyh