From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752634AbcGRUPC (ORCPT ); Mon, 18 Jul 2016 16:15:02 -0400 Received: from lxorguk.ukuu.org.uk ([81.2.110.251]:51958 "EHLO lxorguk.ukuu.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752513AbcGRUO7 (ORCPT ); Mon, 18 Jul 2016 16:14:59 -0400 Date: Mon, 18 Jul 2016 21:14:41 +0100 From: One Thousand Gnomes To: Colin King Cc: kernel-tram@lists.ubuntu.com, Bartlomiej Zolnierkiewicz , Tejun Heo , linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] ata: hpt366: fix incorrect mask when checking at cmd_high_time Message-ID: <20160718211441.086dfbef@lxorguk.ukuu.org.uk> In-Reply-To: <1468322179-9398-1-git-send-email-colin.king@canonical.com> References: <1468322179-9398-1-git-send-email-colin.king@canonical.com> Organization: Intel Corporation X-Mailer: Claws Mail 3.13.2 (GTK+ 2.24.30; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 12 Jul 2016 12:16:19 +0100 Colin King wrote: > From: Colin Ian King > > According to the HPT366 data sheet, PCI config space dword 0x40-0x43 > bits 11:8 specify the primary drive cmd_high_time, however, > currently just 3 bits of the 4 are being used because the mask > is 0x700 and not 0x0f00. Fix the mask, allowing for the 40MHz clock > to be detected. Is this tested on real hardware ? I learned long ago never to blindly trust IDE data sheets. It looks right but if anyone actually has a 40MHz PCI bus box with an HPT366 it would be good to test. Alan