From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754651AbcGTPMR (ORCPT ); Wed, 20 Jul 2016 11:12:17 -0400 Received: from mail-yw0-f196.google.com ([209.85.161.196]:33764 "EHLO mail-yw0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753536AbcGTPMD (ORCPT ); Wed, 20 Jul 2016 11:12:03 -0400 Date: Wed, 20 Jul 2016 11:11:27 -0400 From: "tj@kernel.org" To: Pang Raymond Cc: ide linux , kernel linux Subject: Re: [PATCH] AHCI: Clear GHC.IS to prevent unexpectly asserting INTx Message-ID: <20160720151127.GA4574@htj.duckdns.org> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.6.2 (2016-07-01) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Jul 20, 2016 at 12:13:46PM +0000, Pang Raymond wrote: > > Due to PCI subsystem behaviour, unloading AHCI driver will disable > MSI and enable INTx. When HBA supports MSIx or Multiple MSI, Driver's > irq handler doesn't clear GHC.IS register. It works well when reading or > writing data and GHC.IS is always non-zero. But when unloading driver > (or any other operation which causes disable MSIx and enable INTx), PCI > subsystem uses config write(Rx04.bit10) to enable INTx. Because > GHC.IS is non-zero, HBA will falsely assume some port needs interrupt > service. Then it asserts INTx. To make things worse, when AHCI controller > shares the same interrupt pin with other PCI device, that PCI device's ISR > will be called and nobody de-asserts previous INTx. > This patch clears GHC.IS in ahci_port_stop() even when using MSIx or > MMSI to prevent this case. It ensures GHC.IS is zero before PCI subsystem > enables INTx. > > Signed-off-by: Raymond Pang Applied to libata/for-4.8 with minor updates to the comment. Thanks. -- tejun