From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754491AbcG0KFT (ORCPT ); Wed, 27 Jul 2016 06:05:19 -0400 Received: from foss.arm.com ([217.140.101.70]:43794 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752765AbcG0KFQ (ORCPT ); Wed, 27 Jul 2016 06:05:16 -0400 Date: Wed, 27 Jul 2016 11:05:05 +0100 From: Mark Rutland To: Rich Felker Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sh@vger.kernel.org, Jason Cooper , Marc Zyngier , Rob Herring , Thomas Gleixner Subject: Re: [PATCH v4 1/2] of: add J-Core interrupt controller bindings Message-ID: <20160727100504.GB12880@leverpostej> References: <9039efc9336670b3399b9104f1ab5e1a2d8d9025.1469595861.git.dalias@libc.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <9039efc9336670b3399b9104f1ab5e1a2d8d9025.1469595861.git.dalias@libc.org> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Jul 27, 2016 at 05:35:09AM +0000, Rich Felker wrote: > Signed-off-by: Rich Felker > --- > .../bindings/interrupt-controller/jcore,aic.txt | 26 ++++++++++++++++++++++ > 1 file changed, 26 insertions(+) > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/jcore,aic.txt > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/jcore,aic.txt b/Documentation/devicetree/bindings/interrupt-controller/jcore,aic.txt > new file mode 100644 > index 0000000..b7a56ad > --- /dev/null > +++ b/Documentation/devicetree/bindings/interrupt-controller/jcore,aic.txt > @@ -0,0 +1,26 @@ > +J-Core Advanced Interrupt Controller > + > +Required properties: > + > +- compatible: Should be "jcore,aic1" for the (obsolete) first-generation aic > + with 8 interrupt lines with programmable priorities, or "jcore,aic2" for > + the "aic2" core with 64 interrupts. > + > +- reg: Memory region(s) for configuration. For SMP, there should be one > + region per cpu, indexed by the sequential, zero-based hardware cpu > + number (which is also the logical cpu number). Nit: remove the bit about the logical number. That's a linux detail that doesn't belong in the binding. > +- interrupt-controller: Identifies the node as an interrupt controller > + > +- #interrupt-cells: Specifies the number of cells needed to encode an > + interrupt source. The value shall be 1. ... where the value encoded in that cell is? I guess it's the zero-based index of the interrupt? No flags? Can the AIC only do one trigger type? Thanks, Mark.