From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753083AbcHOXoS (ORCPT ); Mon, 15 Aug 2016 19:44:18 -0400 Received: from shards.monkeyblade.net ([184.105.139.130]:46345 "EHLO shards.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750796AbcHOXoR (ORCPT ); Mon, 15 Aug 2016 19:44:17 -0400 Date: Mon, 15 Aug 2016 16:44:16 -0700 (PDT) Message-Id: <20160815.164416.889081072849280440.davem@davemloft.net> To: vivien.didelot@savoirfairelinux.com Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org, kernel@savoirfairelinux.com, f.fainelli@gmail.com, andrew@lunn.ch Subject: Re: [PATCH net-next 0/6] net: dsa: abstract PHY accesses From: David Miller In-Reply-To: <20160815211902.2236-1-vivien.didelot@savoirfairelinux.com> References: <20160815211902.2236-1-vivien.didelot@savoirfairelinux.com> X-Mailer: Mew version 6.7 on Emacs 24.5 / Mule 6.0 (HANACHIRUSATO) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.5.12 (shards.monkeyblade.net [149.20.54.216]); Mon, 15 Aug 2016 16:44:17 -0700 (PDT) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Vivien Didelot Date: Mon, 15 Aug 2016 17:18:56 -0400 > The Marvell 88E6xxx switch chips have different way to access the PHY > devices registers. > > Old chips use a direct access to the PHY registers. Next chips have a > PHY Polling Unit (PPU) which needs to be disabled before accessing PHY > registers. Newer chips have an indirect access to the PHY devices so > that disabling the PPU is not necessary. > > This patchset abstracts these accesses behind a new mv88e6xxx_phy_* API. > > It also has the side effect to fix the temperature access code for > 88E61xx chips which were using the wrong PHY access functions. Looks good, series applied, thanks.