From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753514AbcHPOQB (ORCPT ); Tue, 16 Aug 2016 10:16:01 -0400 Received: from outbound1.eu.mailhop.org ([52.28.251.132]:10036 "EHLO outbound1.eu.mailhop.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753265AbcHPOP6 (ORCPT ); Tue, 16 Aug 2016 10:15:58 -0400 X-MHO-User: d49e5283-63bb-11e6-ac92-3142cfe117f2 X-Report-Abuse-To: https://support.duocircle.com/support/solutions/articles/5000540958-duocircle-standard-smtp-abuse-information X-Originating-IP: 74.99.77.15 X-Mail-Handler: DuoCircle Outbound SMTP X-DKIM: OpenDKIM Filter v2.6.8 io 328A880328 Date: Tue, 16 Aug 2016 14:14:47 +0000 From: Jason Cooper To: Thomas Petazzoni Cc: Thomas Gleixner , Marc Zyngier , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Rob Herring , Ian Campbell , Pawel Moll , Mark Rutland , Kumar Gala , Andrew Lunn , Sebastian Hesselbarth , Gregory Clement , linux-arm-kernel@lists.infradead.org, Shadi Ammouri , Yehuda Yitschak , Omri Itach , Hanna Hawa , Nadav Haklai , Neta Zur Hershkovits Subject: Re: [PATCH 0/4] arm64: marvell: add support for the PIC and PMU Message-ID: <20160816141447.GQ3353@io.lakedaemon.net> References: <1470408921-447-1-git-send-email-thomas.petazzoni@free-electrons.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1470408921-447-1-git-send-email-thomas.petazzoni@free-electrons.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Thomas, On Fri, Aug 05, 2016 at 04:55:17PM +0200, Thomas Petazzoni wrote: > Hello, > > This small patch series intends to add support for the PMU of the > Cortex-A72 cores found in the Marvell Armada 7K/8K SoCs. > > However, the interrupt of the PMU is not directly connected to the > GIC, but goes through a secondary interrupt controller called the > PIC. Therefore, this series starts by adding a small driver for this > interrupt controller, before enabling the PIC and the PMU in the > Device Tree. > > Thanks! > > Thomas > > Thomas Petazzoni (4): > dt-bindings: interrupt-controller: add DT binding for Marvell 7K/8K > PIC > irqchip: irq-mvebu-pic: new driver for Marvell Armada 7K/8K PIC > arm64: marvell: enable the Marvell PIC driver > arm64: dts: marvell: describe the PIC and PMU on Armada 7K/8K > > .../interrupt-controller/marvell,armada-8k-pic.txt | 25 +++ > arch/arm64/Kconfig.platforms | 1 + > arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 14 ++ > drivers/irqchip/Kconfig | 3 + > drivers/irqchip/Makefile | 1 + > drivers/irqchip/irq-mvebu-pic.c | 195 +++++++++++++++++++++ > 6 files changed, 239 insertions(+) > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/marvell,armada-8k-pic.txt > create mode 100644 drivers/irqchip/irq-mvebu-pic.c Patches 1-3 applied to irqchip/mvebu64. Patch 1 has Rob's Ack. I assume you'll route the dtsi change through a separate branch. thx, Jason.