From: Gabriel Paubert <paubert@iram.es>
To: Christophe Leroy <christophe.leroy@c-s.fr>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>,
Paul Mackerras <paulus@samba.org>,
Michael Ellerman <mpe@ellerman.id.au>,
Scott Wood <oss@buserror.net>,
linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] powerpc/8xx: fix single_step debug
Date: Thu, 18 Aug 2016 12:16:47 +0200 [thread overview]
Message-ID: <20160818101647.GA16503@visitor2.iram.es> (raw)
In-Reply-To: <d371d987-aa4b-20bb-e751-6ced387d5575@c-s.fr>
On Thu, Aug 18, 2016 at 12:13:21PM +0200, Christophe Leroy wrote:
>
>
> Le 18/08/2016 à 11:58, Gabriel Paubert a écrit :
> >On Thu, Aug 18, 2016 at 11:44:20AM +0200, Christophe Leroy wrote:
> >>SPRN_ICR must be read for clearing the internal freeze signal which
> >>is asserted by the single step exception, otherwise the timebase and
> >>decrementer remain freezed
> >
> >Minor nit: s/freezed/frozen/
> >
> >If the timebase and decrementer are frozen even for a few cycles, this
> >probably upsets timekeeping. I consider this a completely stupid design
> >decision, and maybe I'm not alone.
> >
> > Gabriel
>
> We could also unset TBF bit (TimeBase Freeze enable) in TBSCR
> register (today it is set in
> arch/powerpc/platforms/8xx/m8xx_setup.c) but then it would impact
> debug done with an external BDM system which expects the decrementer
> and TB frozen when it freezes the execution.
Ok, I believe that systematically setting it is a mistake, but then I'm
always a bit nervous about screwing up timekeeping (it certainly is
always a very bad idea when you are driving telescopes).
Gabriel
next prev parent reply other threads:[~2016-08-18 10:17 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-18 9:44 Christophe Leroy
2016-08-18 9:58 ` Gabriel Paubert
2016-08-18 10:13 ` Christophe Leroy
2016-08-18 10:16 ` Gabriel Paubert [this message]
2016-08-18 11:38 ` Christophe Leroy
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