From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932453AbcHSCay (ORCPT ); Thu, 18 Aug 2016 22:30:54 -0400 Received: from lxorguk.ukuu.org.uk ([81.2.110.251]:51658 "EHLO lxorguk.ukuu.org.uk" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932393AbcHSCav (ORCPT ); Thu, 18 Aug 2016 22:30:51 -0400 Date: Thu, 18 Aug 2016 16:35:44 +0100 From: One Thousand Gnomes To: "Jan Beulich" Cc: "Andrew Cooper" , "Konrad Rzeszutek Wilk" , , , "xen-devel" , "Boris Ostrovsky" , , "Juergen Gross" , Subject: Re: [Xen-devel] XSA 154 and ISA region (640K -> 1MB) WB cache instead of UC Message-ID: <20160818163544.07c8a051@lxorguk.ukuu.org.uk> In-Reply-To: <57B5B4560200007800107092@prv-mh.provo.novell.com> References: <20160817203238.GA9408@char.us.oracle.com> <57B5A4C90200007800106FF2@prv-mh.provo.novell.com> <47fabc70-4500-1035-7dc7-7f0a3915471f@citrix.com> <57B5B4560200007800107092@prv-mh.provo.novell.com> Organization: Intel Corporation X-Mailer: Claws Mail 3.13.2 (GTK+ 2.24.30; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 18 Aug 2016 05:12:54 -0600 "Jan Beulich" wrote: > >>> On 18.08.16 at 12:16, wrote: > > On 18/08/16 11:06, Jan Beulich wrote: > >>>>> On 17.08.16 at 22:32, wrote: > >>> Looking at the kernel it assumes that WB is ok for 640KB->1MB. > >>> The comment says: > >>> " /* Low ISA region is always mapped WB in page table. No need to track > > *" > >> As per above it's not clear to me what this comment is backed by. > > > > This states what is in the pagetables. Not the combined result with MTRRs. > > > > WB in the pagetables and WC/UB in the MTRRs is a legal combination which > > functions correctly. > > True, but then again - haven't I been told multiple times that Linux > nowadays prefers to run without using MTRRs? The BIOS sets up the fixed MTRR registers for the 640K-1MB window. Those are separate to the variable range MTRR registers used for main memory with specific mappings for segments A000 to BFFF then C000-C7FF / C800-CFFF / etc up to FFFF. Alan