From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755439AbcHSOpQ (ORCPT ); Fri, 19 Aug 2016 10:45:16 -0400 Received: from mail.skyhub.de ([78.46.96.112]:37298 "EHLO mail.skyhub.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754725AbcHSOpP (ORCPT ); Fri, 19 Aug 2016 10:45:15 -0400 Date: Fri, 19 Aug 2016 16:44:53 +0200 From: Borislav Petkov To: Peter Zijlstra Cc: Matt Fleming , linux-kernel@vger.kernel.org, Ingo Molnar Subject: Re: [PATCH] perf/x86/amd: Make HW_CACHE_REFERENCES and HW_CACHE_MISSES measure L2 Message-ID: <20160819144453.GA8459@nazgul.tnic> References: <1470928902-31196-1-git-send-email-matt@codeblueprint.co.uk> <20160811164150.GB7296@nazgul.tnic> <20160815151316.GI30909@codeblueprint.co.uk> <20160818162522.GB5049@nazgul.tnic> <20160819133422.GI10121@twins.programming.kicks-ass.net> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20160819133422.GI10121@twins.programming.kicks-ass.net> User-Agent: Mutt/1.6.0 (2016-04-01) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Aug 19, 2016 at 03:34:22PM +0200, Peter Zijlstra wrote: > Can't those events are NB events and cannot be used on per CPU counters. It fugures, considering L3 is part of the NB on AMD. So the Intel ones are special in the sense that they can be used on per CPU counters even though they're not really per-CPU? -- Regards/Gruss, Boris. ECO tip #101: Trim your mails when you reply. --