From: Peter Zijlstra <peterz@infradead.org>
To: Morten Rasmussen <morten.rasmussen@arm.com>
Cc: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>,
mingo@redhat.com, tglx@linutronix.de, hpa@zytor.com,
rjw@rjwysocki.net, x86@kernel.org, bp@suse.de,
sudeep.holla@arm.com, ak@linux.intel.com,
linux-acpi@vger.kernel.org, linux-pm@vger.kernel.org,
alexey.klimov@arm.com, viresh.kumar@linaro.org,
akpm@linux-foundation.org, linux-kernel@vger.kernel.org,
lenb@kernel.org, tim.c.chen@linux.intel.com,
paul.gortmaker@windriver.com, jpoimboe@redhat.com,
mcgrof@kernel.org, jgross@suse.com, robert.moore@intel.com,
dvyukov@google.com, jeyu@redhat.com
Subject: Re: [PATCH 03/11] sched: Extend scheduler's asym packing
Date: Thu, 25 Aug 2016 15:45:03 +0200 [thread overview]
Message-ID: <20160825134503.GH10138@twins.programming.kicks-ass.net> (raw)
In-Reply-To: <20160825131836.GB1323@e105550-lin.cambridge.arm.com>
On Thu, Aug 25, 2016 at 02:18:37PM +0100, Morten Rasmussen wrote:
> But why not just pass the customized list into the scheduler? Seems
> simpler?
Mostly because I didn't want to regress Power I suppose. The ITMT stuff
needs an extra load, whereas the Power stuff can use the CPU number we
already have.
Also, since we need an interface to pass in this custom list, I don't
see the distinction, you can do the same manipulation by constantly
updating the prio list.
But not of this stuff should be EXPORT'ed, so its only available to the
core kernel, which greatly limits the potential for abuse. We can see
arch code just fine.
And if you spin a custom kernel, you can already wreck the load
balancer.
next prev parent reply other threads:[~2016-08-25 13:45 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-08-18 22:36 [PATCH 00/11] Support Intel® Turbo Boost Max Technology 3.0 Srinivas Pandruvada
2016-08-18 22:36 ` [PATCH 01/11] sched, cpuset: Add regenerate_sched_domains function to rebuild all sched domains Srinivas Pandruvada
2016-08-22 13:52 ` Morten Rasmussen
2016-08-22 19:51 ` Tim Chen
2016-08-18 22:36 ` [PATCH 02/11] sched, x86: Add SD_ASYM_PACKING flags to x86 cpu topology for cpus supporting Intel Turbo Boost Max Technology Srinivas Pandruvada
2016-08-18 22:36 ` [PATCH 03/11] sched: Extend scheduler's asym packing Srinivas Pandruvada
2016-08-25 11:22 ` Morten Rasmussen
2016-08-25 11:45 ` Peter Zijlstra
2016-08-25 13:18 ` Morten Rasmussen
2016-08-25 13:45 ` Peter Zijlstra [this message]
2016-08-26 10:39 ` Morten Rasmussen
2016-08-26 12:42 ` Peter Zijlstra
2016-08-26 17:25 ` Tim Chen
2016-08-26 23:14 ` Tim Chen
2016-08-18 22:36 ` [PATCH 04/11] sched,x86: Enable Turbo Boost Max Technology Srinivas Pandruvada
2016-08-22 9:01 ` kbuild test robot
2016-08-22 19:04 ` Tim Chen
2016-08-24 10:18 ` Ingo Molnar
2016-08-24 17:50 ` Tim Chen
2016-08-24 18:08 ` Ingo Molnar
2016-08-24 18:22 ` Peter Zijlstra
2016-08-18 22:36 ` [PATCH 05/11] acpi: cppc: Allow build with ACPI_CPU_FREQ_PSS config Srinivas Pandruvada
2016-08-20 0:46 ` Rafael J. Wysocki
2016-08-18 22:36 ` [PATCH 06/11] acpi: cpcc: Add integer read support Srinivas Pandruvada
2016-08-18 22:36 ` [PATCH 07/11] acpi: cppc: Add support for function fixed hardware address Srinivas Pandruvada
2016-08-20 0:49 ` Rafael J. Wysocki
2016-08-18 22:36 ` [PATCH 08/11] acpi: cppc: Add prefix cppc to cpudata structure name Srinivas Pandruvada
2016-08-18 22:36 ` [PATCH 09/11] acpi: bus: Enable HWP CPPC objects Srinivas Pandruvada
2016-08-20 0:49 ` Rafael J. Wysocki
2016-08-18 22:36 ` [PATCH 10/11] acpi: bus: Set _OSC for diverse core support Srinivas Pandruvada
2016-08-20 0:51 ` Rafael J. Wysocki
2016-08-18 22:36 ` [PATCH 11/11] cpufreq: intel_pstate: Use CPPC to get max performance Srinivas Pandruvada
2016-08-22 11:59 ` kbuild test robot
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