From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752725AbcIDFnd (ORCPT ); Sun, 4 Sep 2016 01:43:33 -0400 Received: from mail.kmu-office.ch ([178.209.48.109]:39187 "EHLO mail.kmu-office.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750764AbcIDFnc (ORCPT ); Sun, 4 Sep 2016 01:43:32 -0400 From: Stefan Agner To: linux@armlinux.org.uk Cc: ard.biesheuvel@linaro.org, matt@codeblueprint.co.uk, kirill.shutemov@linux.intel.com, l.stach@pengutronix.de, arnd@arndb.de, nicolas.pitre@linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Stefan Agner Subject: [PATCH] ARM: LPAE: initialize cachepolicy correctly Date: Sat, 3 Sep 2016 22:33:31 -0700 Message-Id: <20160904053331.7264-1-stefan@agner.ch> X-Mailer: git-send-email 2.9.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The cachepolicy variable gets initialized using a masked pmd So far, the pmd has been masked with flags valid for the 2-page table format. In the LPAE case, this lead to a wrong assumption of what the initial cachepolicy has been used. Later a check forces the cache policy to writealloc and prints the following warning: Forcing write-allocate cache policy for SMP This patch uses PMD_SECT_WBWA to mask all cache setting flags. The define represents the complete mask of the cache relevant flags for both page table formats. Signed-off-by: Stefan Agner --- arch/arm/mm/mmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mm/mmu.c b/arch/arm/mm/mmu.c index 724d6be..241e5e2 100644 --- a/arch/arm/mm/mmu.c +++ b/arch/arm/mm/mmu.c @@ -137,7 +137,7 @@ void __init init_default_cache_policy(unsigned long pmd) initial_pmd_value = pmd; - pmd &= PMD_SECT_TEX(1) | PMD_SECT_BUFFERABLE | PMD_SECT_CACHEABLE; + pmd &= PMD_SECT_WBWA; for (i = 0; i < ARRAY_SIZE(cache_policies); i++) if (cache_policies[i].pmd == pmd) { -- 2.9.0