From: Paul Burton <paul.burton@imgtec.com>
To: <linux-mips@linux-mips.org>
Cc: Paul Burton <paul.burton@imgtec.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>,
<linux-kernel@vger.kernel.org>
Subject: [PATCH 2/2] clocksource: mips-gic-timer: Stop checking cpu_has_counter
Date: Tue, 13 Sep 2016 17:56:44 +0100 [thread overview]
Message-ID: <20160913165644.627-2-paul.burton@imgtec.com> (raw)
In-Reply-To: <20160913165644.627-1-paul.burton@imgtec.com>
The cpu_has_counter macro indicates whether the current CPU has a
working coprocessor 0 count & compare registers, and has no bearing on
the GIC. Stop checking it.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
---
drivers/clocksource/mips-gic-timer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clocksource/mips-gic-timer.c b/drivers/clocksource/mips-gic-timer.c
index 802055b..7a960cd 100644
--- a/drivers/clocksource/mips-gic-timer.c
+++ b/drivers/clocksource/mips-gic-timer.c
@@ -109,7 +109,7 @@ static int gic_clockevent_init(void)
{
int ret;
- if (!cpu_has_counter || !gic_frequency)
+ if (!gic_frequency)
return -ENXIO;
ret = setup_percpu_irq(gic_timer_irq, &gic_compare_irqaction);
--
2.9.3
next prev parent reply other threads:[~2016-09-13 16:57 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-09-13 16:56 [PATCH 1/2] clocksource: mips-gic-timer: Print an error if IRQ setup fails Paul Burton
2016-09-13 16:56 ` Paul Burton [this message]
2016-09-20 21:31 ` [tip:timers/core] clocksource/mips-gic-timer: Stop checking cpu_has_counter tip-bot for Paul Burton
2016-09-20 21:30 ` [tip:timers/core] clocksource/mips-gic-timer: Print an error if IRQ setup fails tip-bot for Paul Burton
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