From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1764170AbcIPRiO (ORCPT ); Fri, 16 Sep 2016 13:38:14 -0400 Received: from mail-wm0-f65.google.com ([74.125.82.65]:33813 "EHLO mail-wm0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934703AbcIPRiH (ORCPT ); Fri, 16 Sep 2016 13:38:07 -0400 Date: Fri, 16 Sep 2016 20:38:01 +0300 From: Iaroslav Gridin To: Andy Gross Cc: david.brown@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, linux@armlinux.org.uk, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] ARM: dts: msm8974: Add definitions for QCE & cryptobam Message-ID: <20160916173800.r264xg5wqmer77wr@localhost> References: <20160830153740.13275-1-voker57@gmail.com> <20160915211842.GB5431@hector.attlocal.net> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20160915211842.GB5431@hector.attlocal.net> User-Agent: NeoMutt/20160827 (1.7.0) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Sep 15, 2016 at 04:18:42PM -0500, Andy Gross wrote: > Actually, on thinking about this more, the bam block itself only requires the > single clock. The peripheral it is attached to has to keep its sanity during > the duration of the transfer (crypto). The crypto requires 3 clocks, one of > which is the same clk the bam requires. > > You can access the BAM registers with the bam_clk only, correct? Not preparing bam_clk degrades QCE performance about 3x, though.