From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752901AbcJEVrZ (ORCPT ); Wed, 5 Oct 2016 17:47:25 -0400 Received: from mail.kmu-office.ch ([178.209.48.109]:59212 "EHLO mail.kmu-office.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751020AbcJEVrY (ORCPT ); Wed, 5 Oct 2016 17:47:24 -0400 From: Stefan Agner To: meng.yi@nxp.com, dri-devel@lists.freedesktop.org Cc: alison.wang@freescale.com, jianwei.wang.chn@gmail.com, linux-kernel@vger.kernel.org, Stefan Agner Subject: [PATCH v2 0/5] drm/fsl-dcu: initialization fixes Date: Wed, 5 Oct 2016 14:46:56 -0700 Message-Id: <20161005214703.1604-1-stefan@agner.ch> X-Mailer: git-send-email 2.10.0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi All, This is an assortment of fixes which solve issues seen using an external RGB converter and makes sure that pixel clock is only on when really required. Meng, would be good if you can test it on a LS1021a. -- Stefan Changes since v1: - add patch to no not transfer registers in mode_set_nofb - add patch which only init fbdev if required - remove disable unprepare pixel clock on module remove (already disabled in CRTC disable callback). - remove unused label Stefan Agner (5): drm/fsl-dcu: enable TCON bypass mode by default drm/fsl-dcu: do not transfer registers on plane init drm/fsl-dcu: do not transfer registers in mode_set_nofb drm/fsl-dcu: enable pixel clock when enabling CRTC drm/fsl-dcu: only init fbdev if required drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_crtc.c | 4 +-- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 25 +++---------------- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c | 5 ---- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_rgb.c | 38 +++-------------------------- 4 files changed, 10 insertions(+), 62 deletions(-) -- 2.10.0