From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S935088AbcKJQoa (ORCPT ); Thu, 10 Nov 2016 11:44:30 -0500 Received: from mga11.intel.com ([192.55.52.93]:57286 "EHLO mga11.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934615AbcKJQo3 (ORCPT ); Thu, 10 Nov 2016 11:44:29 -0500 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.31,619,1473145200"; d="scan'208";a="2436090" Date: Thu, 10 Nov 2016 18:39:39 +0200 From: Mika Westerberg To: Andy Shevchenko Cc: Lee Jones , linux-kernel@vger.kernel.org Subject: Re: [PATCH v1 1/1] mfd: intel-lpss: Try to enable Memory-Write-Invalidate Message-ID: <20161110163939.GN1470@lahna.fi.intel.com> References: <20161110145142.159911-1-andriy.shevchenko@linux.intel.com> <20161110145930.GL1470@lahna.fi.intel.com> <1478791360.5295.119.camel@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1478791360.5295.119.camel@linux.intel.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo User-Agent: Mutt/1.7.1 (2016-10-04) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Nov 10, 2016 at 05:22:40PM +0200, Andy Shevchenko wrote: > On Thu, 2016-11-10 at 16:59 +0200, Mika Westerberg wrote: > > On Thu, Nov 10, 2016 at 04:51:42PM +0200, Andy Shevchenko wrote: > > > Enable MWI mechanism if PCI bus master supports it. > > > > Why? > > It might be potential benefit in some cases. Documentation says that > standard Memory Write might supply more current data than in the CPU > modified cache line and "trashing a line in the cache may trash some > data that is more current that in the memory line". This allows to avoid > potential retries and other performance degradation issues on the bus. > Though, I dunno how to measure it. > > Would be enough to extend commit message by this paragraph? That's better, yes.