From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752963AbcLBXRh (ORCPT ); Fri, 2 Dec 2016 18:17:37 -0500 Received: from mga07.intel.com ([134.134.136.100]:10114 "EHLO mga07.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751307AbcLBXRg (ORCPT ); Fri, 2 Dec 2016 18:17:36 -0500 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,289,1477983600"; d="scan'208";a="1093886143" From: Andi Kleen To: peterz@infradead.org Cc: linux-kernel@vger.kernel.org, Andi Kleen , alexander.shishkin@intel.com, kan.liang@intel.com, stable@vger.kernel.org#4.6+ Subject: [PATCH] perf/x86: Fix exclusion of BTS and LBR for Goldmont Date: Fri, 2 Dec 2016 15:17:32 -0800 Message-Id: <20161202231732.25478-1-andi@firstfloor.org> X-Mailer: git-send-email 2.9.3 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Andi Kleen The earlier patch ccbebba4 allowed enabling PT and LBR at the same time on Goldmont. However it also allowed enabling BTS and LBR at the same time, which is still not supported. Fix this by bypassing the check only for PT. Marking for stable because this allows crashing kernels. Also should be merged for 4.9. Fixes: ccbebba4 ("erf/x86/intel/pt: Bypass PT vs. LBR exclusivity if the core supports it") Cc: alexander.shishkin@intel.com Cc: kan.liang@intel.com Cc: stable@vger.kernel.org # 4.6+ Signed-off-by: Andi Kleen --- arch/x86/events/core.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c index d0efb5cb1b00..baa1eed55e88 100644 --- a/arch/x86/events/core.c +++ b/arch/x86/events/core.c @@ -364,7 +364,7 @@ int x86_add_exclusive(unsigned int what) { int i; - if (x86_pmu.lbr_pt_coexist) + if (what == x86_lbr_exclusive_pt && x86_pmu.lbr_pt_coexist) return 0; if (!atomic_inc_not_zero(&x86_pmu.lbr_exclusive[what])) { @@ -387,7 +387,7 @@ fail_unlock: void x86_del_exclusive(unsigned int what) { - if (x86_pmu.lbr_pt_coexist) + if (what == x86_lbr_exclusive_pt && x86_pmu.lbr_pt_coexist) return; atomic_dec(&x86_pmu.lbr_exclusive[what]); -- 2.9.3