[PATCH] iommu/intel: disable DMAR for Q35 integrated gfx

[Kees Cook <keescook@chromium.org>]

This blacklists the Q35 integrated graphics so IOMMU can be otherwise
enabled. Without this, a Q35 system can only enable IOMMU when booting
with "intel_iommu=on,igfx_off" but not "intel_iommu=on".

00:02.0 0300: 8086:29b2 (rev 02) (prog-if 00 [VGA controller])
        Subsystem: 8086:4f4a
        Flags: bus master, fast devsel, latency 0, IRQ 32
        Memory at e0380000 (32-bit, non-prefetchable) [size=512K]
        I/O ports at 2460 [size=8]
        Memory at d0000000 (32-bit, prefetchable) [size=256M]
        Memory at e0200000 (32-bit, non-prefetchable) [size=1M]
        Expansion ROM at <unassigned> [disabled]
        Capabilities: <access denied>
        Kernel driver in use: i915
        Kernel modules: i915

Signed-off-by: Kees Cook <keescook@chromium.org>
---
 drivers/iommu/intel-iommu.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index d8376c2d18b3..24e5b06834ae 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -5327,6 +5327,7 @@ static void quirk_iommu_g4x_gfx(struct pci_dev *dev)
 	dmar_map_gfx = 0;
 }
 
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x29b2, quirk_iommu_g4x_gfx);
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2a40, quirk_iommu_g4x_gfx);
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e00, quirk_iommu_g4x_gfx);
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2e10, quirk_iommu_g4x_gfx);
-- 
2.7.4


-- 
Kees Cook
Nexus Security