From: Rob Herring <robh@kernel.org>
To: Andrew Jeffery <andrew@aj.id.au>
Cc: Linus Walleij <linus.walleij@linaro.org>,
Mark Rutland <mark.rutland@arm.com>,
Lee Jones <lee.jones@linaro.org>, Joel Stanley <joel@jms.id.au>,
linux-gpio@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 2/5] pinctrl: aspeed: Read and write bits in LPC and GFX controllers
Date: Thu, 22 Dec 2016 15:03:45 -0600 [thread overview]
Message-ID: <20161222210345.s5cvix4uzmapjns3@rob-hp-laptop> (raw)
In-Reply-To: <20161220073551.28522-3-andrew@aj.id.au>
On Tue, Dec 20, 2016 at 06:05:48PM +1030, Andrew Jeffery wrote:
> The System Control Unit IP block in the Aspeed SoCs is typically where
> the pinmux configuration is found, but not always. A number of pins
> depend on state in one of LPC Host Control (LHC) or SoC Display
> Controller (GFX) IP blocks, so the Aspeed pinmux drivers should have the
> means to adjust these as necessary.
>
> We use syscon to cast a regmap over the GFX and LPC blocks, which is
> used as an arbitration layer between the relevant driver and the pinctrl
> subsystem. The regmaps are then exposed to the SoC-specific pinctrl
> drivers by phandles in the devicetree, and are selected during a mux
> request by querying a new 'ip' member in struct aspeed_sig_desc.
>
> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
> Reviewed-by: Joel Stanley <joel@jms.id.au>
> ---
>
> Joel: I kept your r-b tag here despite reworking the g5 example bindings, as
> you've given your r-b for the lpc bindings which are what I have added.
>
> .../devicetree/bindings/pinctrl/pinctrl-aspeed.txt | 80 ++++++++--
Acked-by: Rob Herring <robh@kernel.org>
> drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c | 18 +--
> drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c | 48 ++++--
> drivers/pinctrl/aspeed/pinctrl-aspeed.c | 161 +++++++++++++--------
> drivers/pinctrl/aspeed/pinctrl-aspeed.h | 32 ++--
> 5 files changed, 242 insertions(+), 97 deletions(-)
next prev parent reply other threads:[~2016-12-22 21:03 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-20 7:35 [PATCH v4 0/5] pinctrl: aspeed: Implement remaining pins Andrew Jeffery
2016-12-20 7:35 ` [PATCH v4 1/5] pinctrl: aspeed: dt: Fix compatibles for the System Control Unit Andrew Jeffery
2016-12-20 7:56 ` Joel Stanley
2016-12-22 21:01 ` Rob Herring
2016-12-27 22:14 ` Linus Walleij
2016-12-20 7:35 ` [PATCH v4 2/5] pinctrl: aspeed: Read and write bits in LPC and GFX controllers Andrew Jeffery
2016-12-22 21:03 ` Rob Herring [this message]
2016-12-27 22:16 ` Linus Walleij
2016-12-20 7:35 ` [PATCH v4 3/5] pinctrl: aspeed-g4: Add mux configuration for all pins Andrew Jeffery
2016-12-27 22:18 ` Linus Walleij
2016-12-20 7:35 ` [PATCH v4 4/5] pinctrl: aspeed-g5: " Andrew Jeffery
2016-12-28 0:22 ` Linus Walleij
2016-12-20 7:35 ` [PATCH v4 5/5] pinctrl: aspeed: Fix kerneldoc return descriptions Andrew Jeffery
2016-12-28 0:23 ` Linus Walleij
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20161222210345.s5cvix4uzmapjns3@rob-hp-laptop \
--to=robh@kernel.org \
--cc=andrew@aj.id.au \
--cc=devicetree@vger.kernel.org \
--cc=joel@jms.id.au \
--cc=lee.jones@linaro.org \
--cc=linus.walleij@linaro.org \
--cc=linux-gpio@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mark.rutland@arm.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox
all inboxes | Powered by JetHome®