From: Zhenyu Wang <zhenyuw@linux.intel.com>
To: Nicolas Iooss <nicolas.iooss_linux@m4x.org>
Cc: Zhi Wang <zhi.a.wang@intel.com>,
igvt-g-dev@ml01.01.org, intel-gfx@lists.freedesktop.org,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org
Subject: Re: [igvt-g-dev] [PATCH 1/1] drm/i915/gvt: verify functions types in new_mmio_info()
Date: Tue, 27 Dec 2016 10:51:53 +0800 [thread overview]
Message-ID: <20161227025153.3bnbzfyed7s3ptjy@zhen-hp.sh.intel.com> (raw)
In-Reply-To: <20161226135223.4563-1-nicolas.iooss_linux@m4x.org>
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On 2016.12.26 14:52:23 +0100, Nicolas Iooss wrote:
> The current prototype of new_mmio_info() uses void* for parameters read
> and write, which are functions with precise calling conventions
> (argument types and return type). Write down these conventions in
> new_mmio_info() definition.
>
> This has been reported by the following warnings when clang is used to
> build the kernel:
>
> drivers/gpu/drm/i915/gvt/handlers.c:124:21: error: pointer type
> mismatch ('void *' and 'int (*)(struct intel_vgpu *, unsigned int,
> void *, unsigned int)') [-Werror,-Wpointer-type-mismatch]
> info->read = read ? read : intel_vgpu_default_mmio_read;
> ^ ~~~~ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> drivers/gpu/drm/i915/gvt/handlers.c:125:23: error: pointer type
> mismatch ('void *' and 'int (*)(struct intel_vgpu *, unsigned int,
> void *, unsigned int)') [-Werror,-Wpointer-type-mismatch]
> info->write = write ? write : intel_vgpu_default_mmio_write;
> ^ ~~~~~ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
>
> This allows the compiler to detect that sbi_ctl_mmio_write() returns a
> "bool" value instead of an expected "int" one. Fix this.
>
Looks good to me. Will queue this up. Thanks
> Signed-off-by: Nicolas Iooss <nicolas.iooss_linux@m4x.org>
> ---
> drivers/gpu/drm/i915/gvt/handlers.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c
> index 522809710312..052e57124c0a 100644
> --- a/drivers/gpu/drm/i915/gvt/handlers.c
> +++ b/drivers/gpu/drm/i915/gvt/handlers.c
> @@ -93,7 +93,8 @@ static void write_vreg(struct intel_vgpu *vgpu, unsigned int offset,
> static int new_mmio_info(struct intel_gvt *gvt,
> u32 offset, u32 flags, u32 size,
> u32 addr_mask, u32 ro_mask, u32 device,
> - void *read, void *write)
> + int (*read)(struct intel_vgpu *, unsigned int, void *, unsigned int),
> + int (*write)(struct intel_vgpu *, unsigned int, void *, unsigned int))
> {
> struct intel_gvt_mmio_info *info, *p;
> u32 start, end, i;
> @@ -974,7 +975,7 @@ static int sbi_data_mmio_read(struct intel_vgpu *vgpu, unsigned int offset,
> return 0;
> }
>
> -static bool sbi_ctl_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,
> +static int sbi_ctl_mmio_write(struct intel_vgpu *vgpu, unsigned int offset,
> void *p_data, unsigned int bytes)
> {
> u32 data;
> --
> 2.11.0
>
> _______________________________________________
> igvt-g-dev mailing list
> igvt-g-dev@lists.01.org
> https://lists.01.org/mailman/listinfo/igvt-g-dev
--
Open Source Technology Center, Intel ltd.
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prev parent reply other threads:[~2016-12-27 2:56 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-26 13:52 Nicolas Iooss
2016-12-27 2:51 ` Zhenyu Wang [this message]
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