From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S937001AbdAER61 (ORCPT ); Thu, 5 Jan 2017 12:58:27 -0500 Received: from mail.free-electrons.com ([62.4.15.54]:36597 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1761979AbdAER6O (ORCPT ); Thu, 5 Jan 2017 12:58:14 -0500 Date: Thu, 5 Jan 2017 18:57:46 +0100 From: Maxime Ripard To: Rob Herring Cc: Andre Przywara , Ulf Hansson , Chen-Yu Tsai , Hans De Goede , Icenowy Zheng , Mark Rutland , devicetree@vger.kernel.org, linux-mmc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@googlegroups.com, linux-kernel@vger.kernel.org Subject: Re: [PATCH 2/5] drivers: mmc: sunxi: limit A64 MMC2 to 8K DMA buffer Message-ID: <20170105175746.fq6crpc3krz7tzxi@lukather> References: <1483398226-29321-1-git-send-email-andre.przywara@arm.com> <1483398226-29321-3-git-send-email-andre.przywara@arm.com> <20170104140750.7qs4pvggwjdj5cma@rob-hp-laptop> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="chu2rgfkbjn4epfw" Content-Disposition: inline In-Reply-To: <20170104140750.7qs4pvggwjdj5cma@rob-hp-laptop> User-Agent: Mutt/1.6.2-neo (2016-08-21) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org --chu2rgfkbjn4epfw Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi Rob, On Wed, Jan 04, 2017 at 08:07:50AM -0600, Rob Herring wrote: > On Mon, Jan 02, 2017 at 11:03:43PM +0000, Andre Przywara wrote: > > From: Maxime Ripard > >=20 > > Unlike the A64 user manual reports, the third MMC controller on the > > A64 (and the only one capable of 8-bit HS400 eMMC transfers) has a > > DMA buffer size limit of 8KB (much like the very old Allwinner SoCs). > > This does not affect the other two controllers, so introduce a new > > DT compatible string to let the driver use different settings for that > > particular device. This will also help to enable the high-speed transfer > > modes of that controller later. > >=20 > > Signed-off-by: Maxime Ripard > > Signed-off-by: Andre Przywara > > --- > > Documentation/devicetree/bindings/mmc/sunxi-mmc.txt | 1 + > > drivers/mmc/host/sunxi-mmc.c | 7 +++++++ > > 2 files changed, 8 insertions(+) >=20 > Acked-by: Rob Herring Some kind of a digression on this: we have three MMC controllers on this SoC. Like this patch shows, the third one is clearly different, and supports both more modes, a wider bus, and specific quirks. We need a new compatible for this one, everything's perfect. However, the other two are mostly the same, but seems to need different tuning parameters to get more performances out of the controller (but this is unclear yet). How do we usually deal with that? Thanks, Maxime --=20 Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com --chu2rgfkbjn4epfw Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIcBAEBCAAGBQJYbokVAAoJEBx+YmzsjxAgkpoP/383MRMng+cRbuCRTgjtH3n+ xlKKOTdFRnaYJuoYvxNhu9swMzTyKo/Z+hosKz5SSzvgmnwdVvmLWtQNl6Ao4PJP uVkeGWAyYCiroKmQhMl++cG9E8pKfh/rXltUSQnIWm/6HRyS4zk21IGvLb9hZC6+ 866sfRaftAJ31oQEJGtxY7fCIYxPzQB2Hj8AQhlfiUXUPuHF0Ne4XwU9AH5EmcV0 koYXRaBTBBYZ46pV/qYfh74wkEcJ2vpIW5CyARHlGNoERzwVhA2kDfe7a9Bhchwd //RuJCfrncIlF+wZIvgGkIZByIJp97KMWw6KLToNv+FagPhgVKtgjU/89Ze9yz/0 xUNotvijNzQTcHoPDzlzWD/dyUHwmORDuZN2/Ph7apd+6uG8O3CNR0YchBRVgnXH eMC5WA1Sw9V981uuolvCgfXUOKeLnp8LcW3wKNWPgaaCOSAWhndF9BXpf83XZr7y qWb02hkCiUpkYQdyl3o3TiD/nmXKng6+NtOh9xQCuHqM6gKA6uN5rQ+3nwTHYf+Z HBqM0PUX5cU3XCqZyY6O9H3KN65YNJ1yBSkn8rVXtTmTiDNOmMvdxyvBIC0g+sJC fssRB8L0rmHJhNkfeD4ZO+cQGKwYyRencElv1wR9tBBPq1bThzUpdmWxIzdBg2n0 pYs6wuwVD5+mLzTBWzqP =C7n4 -----END PGP SIGNATURE----- --chu2rgfkbjn4epfw--