From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759472AbdAIMFZ (ORCPT ); Mon, 9 Jan 2017 07:05:25 -0500 Received: from foss.arm.com ([217.140.101.70]:53262 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752749AbdAIMEk (ORCPT ); Mon, 9 Jan 2017 07:04:40 -0500 Date: Mon, 9 Jan 2017 12:04:35 +0000 From: Catalin Marinas To: Suzuki K Poulose Cc: mark.rutland@arm.com, ryan.arnold@linaro.org, sid@reserved-bit.com, aph@redhat.com, will.deacon@arm.com, linux-kernel@vger.kernel.org, adhemerval.zanella@linaro.org, dave.martin@arm.com, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH v3 4/9] arm64: cpufeature: Document the rules of safe value for features Message-ID: <20170109120434.GA7593@e104818-lin.cambridge.arm.com> References: <1483552147-9605-1-git-send-email-suzuki.poulose@arm.com> <1483552147-9605-5-git-send-email-suzuki.poulose@arm.com> <20170106123011.GB12863@e104818-lin.cambridge.arm.com> <2338875a-6a5b-ba9e-59fe-d681091c2923@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <2338875a-6a5b-ba9e-59fe-d681091c2923@arm.com> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Jan 09, 2017 at 10:43:07AM +0000, Suzuki K. Poulose wrote: > On 06/01/17 12:30, Catalin Marinas wrote: > >On Wed, Jan 04, 2017 at 05:49:02PM +0000, Suzuki K. Poulose wrote: > >>--- a/arch/arm64/include/asm/cpufeature.h > >>+++ b/arch/arm64/include/asm/cpufeature.h > >>@@ -29,7 +29,21 @@ > >> #include > >> #include > >> > >>-/* CPU feature register tracking */ > >>+/* > >>+ * CPU feature register tracking > >>+ * > >>+ * The safe value of a CPUID feature field is dependent on the implications > >>+ * of the values assigned to it by the architecture. Based on the relationship > >>+ * between the values, the features are classified into 3 types. > >>+ * > >>+ * a) LOWER_SAFE - The value 'n+1' indicates, value 'n' and some > >>+ * additional features. (where n >= 0). The smaller value (n) is > >>+ * considered safer in this case. > >>+ * b) HIGHER_SAFE - The value 'n+1' is safer than 'n' (for n>= 0). > >>+ * c) EXACT - If the values of the feature don't have any relationship, > >>+ * a predefined safe value is used. > >>+ */ > > > >I don't think this text fully describes what is actually compared. You > >could say something that the lowest value of all the CPUs is chosen for > >LOWER_SAFE, highest for HIGHER_SAFE and it is expected that all CPUs > >have the same value for a field when EXACT is specified. > > Ok. I have changed it as below : > > /* > * CPU feature register tracking > * > * The safe value of a CPUID feature field is dependent on the implications > * of the values assigned to it by the architecture. Based on the relationship > * between the values, the features are classified into 3 types - LOWER_SAFE, > * HIGHER_SAFE and EXACT. > * > * The lowest value of all the CPUs is chosen for LOWER_SAFE and highest > * for HIGHER_SAFE. It is expected that all CPUs have the same value for > * a field when EXACT is specified, failing which, the safe value specified > * in the table is chosen. > */ It looks better to me. Thanks. Reviewed-by: Catalin Marinas