From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S938595AbdAJRoP (ORCPT ); Tue, 10 Jan 2017 12:44:15 -0500 Received: from foss.arm.com ([217.140.101.70]:60240 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752378AbdAJRoM (ORCPT ); Tue, 10 Jan 2017 12:44:12 -0500 Date: Tue, 10 Jan 2017 17:43:11 +0000 From: Mark Rutland To: Anurup M Cc: robh+dt@kernel.org, gregkh@linuxfoundation.org, catalin.marinas@arm.com, arnd@arndb.de, geert+renesas@glider.be, davem@davemloft.net, akpm@linux-foundation.org, corbet@lwn.net, will.deacon@arm.com, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, anurup.m@huawei.com, zhangshaokun@hisilicon.com, tanxiaojun@huawei.com, xuwei5@hisilicon.com, sanil.kumar@hisilicon.com, john.garry@huawei.com, gabriele.paoloni@huawei.com, shiju.jose@huawei.com, wangkefeng.wang@huawei.com, linuxarm@huawei.com, shyju.pv@huawei.com Subject: Re: [PATCH v3 00/10] perf: arm64: Support for Hisilicon SoC Hardware event counters Message-ID: <20170110174311.GB24036@leverpostej> References: <1483339672-23778-1-git-send-email-anurup.m@huawei.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1483339672-23778-1-git-send-email-anurup.m@huawei.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On Mon, Jan 02, 2017 at 01:47:52AM -0500, Anurup M wrote: > ToDo: > 1) The counter overflow handling is currently unsupported in this > patch series. >>From a quick scan of the patches, I see mention of an interrupt in a comment the driver, but there's noething in the DT binding. Is there an overflow interrupt at all? Or do you need to implement polling to avoid overflow? This is a prerequisite for merging the driver. Thanks, Mark.