From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751079AbdAQTsM (ORCPT ); Tue, 17 Jan 2017 14:48:12 -0500 Received: from mail-pf0-f179.google.com ([209.85.192.179]:34486 "EHLO mail-pf0-f179.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750997AbdAQTsJ (ORCPT ); Tue, 17 Jan 2017 14:48:09 -0500 From: Stephen Boyd To: Andy Gross Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH] arm64: dts: qcom: Replace PMU compatible with a53 specific one Date: Tue, 17 Jan 2017 11:47:55 -0800 Message-Id: <20170117194755.2061-1-stephen.boyd@linaro.org> X-Mailer: git-send-email 2.10.0.297.gf6727b0 Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The PMU on msm8916 is for the cortex-a53 type CPU. Update the compatible to the more specific one so we can get the a53 specific events out of the PMU. Signed-off-by: Stephen Boyd --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index 466ca5705c99..572d1a58844f 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -156,7 +156,7 @@ }; pmu { - compatible = "arm,armv8-pmuv3"; + compatible = "arm,cortex-a53-pmu"; interrupts = ; }; -- 2.10.0.297.gf6727b0