From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751476AbdAUUrp (ORCPT ); Sat, 21 Jan 2017 15:47:45 -0500 Received: from mail-oi0-f68.google.com ([209.85.218.68]:36383 "EHLO mail-oi0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751123AbdAUUrh (ORCPT ); Sat, 21 Jan 2017 15:47:37 -0500 Date: Sat, 21 Jan 2017 14:39:20 -0600 From: Rob Herring To: Markus Mayer Cc: Michael Turquette , Stephen Boyd , Mark Rutland , Viresh Kumar , "Rafael J . Wysocki" , Arnd Bergmann , Markus Mayer , Broadcom Kernel List , Linux Clock List , Power Management List , Device Tree List , ARM Kernel List , Linux Kernel Mailing List Subject: Re: [PATCH v5 1/2] dt-bindings: brcm: clocks: add binding for brcmstb-cpu-clk-div Message-ID: <20170121203920.ijtrpdsff24rcjgs@rob-hp-laptop> References: <20170119002933.7529-1-code@mmayer.net> <20170119002933.7529-2-code@mmayer.net> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20170119002933.7529-2-code@mmayer.net> User-Agent: Mutt/1.6.2-neo (2016-08-21) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Jan 18, 2017 at 04:29:32PM -0800, Markus Mayer wrote: > From: Markus Mayer > > Add binding document for brcm,brcmstb-cpu-clk-div. > > Signed-off-by: Markus Mayer > --- > .../bindings/clock/brcm,brcmstb-cpu-clk-div.txt | 27 ++++++++++++++++++++++ > MAINTAINERS | 1 + > 2 files changed, 28 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/brcm,brcmstb-cpu-clk-div.txt > > diff --git a/Documentation/devicetree/bindings/clock/brcm,brcmstb-cpu-clk-div.txt b/Documentation/devicetree/bindings/clock/brcm,brcmstb-cpu-clk-div.txt > new file mode 100644 > index 0000000..c4acb53 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/brcm,brcmstb-cpu-clk-div.txt > @@ -0,0 +1,27 @@ > +The CPU divider node serves as the sole clock for the CPU complex. It supports > +power-of-2 clock division, with a divider of "1" as the default highest-speed > +setting. > + > +Required properties: > +- compatible: shall be "brcm,brcmstb-cpu-clk-div" > +- reg: address and width of the divider configuration register > +- #clock-cells: shall be set to 0 > +- clocks: phandle of clock provider which provides the source clock > + (this would typically be a "fixed-clock" type PLL) > +- div-table: list of (raw_value,divider) ordered pairs that correspond to the > + allowed clock divider settings Why do you need 2 values? Can't you use the index or calculate the register value from the divider value? > +- div-shift-width: least-significant bit position and width of divider value > + > +Optional properties: > +- clock-names: the clock may be named > + > +Example: > + cpuclkdiv: cpu-clk-div@f03e257c { clock-controller@... > + compatible = "brcm,brcmstb-cpu-clk-div"; > + reg = <0xf03e257c 0x4>; > + div-table = <0x00 1>; > + div-shift-width = <0 5>; > + #clock-cells = <0>; > + clocks = <&cpupll>; > + clock-names = "cpupll"; > + }; > diff --git a/MAINTAINERS b/MAINTAINERS > index cfff2c9..690761d 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -2786,6 +2786,7 @@ M: bcm-kernel-feedback-list@broadcom.com > L: linux-pm@vger.kernel.org > S: Maintained > F: Documentation/devicetree/bindings/cpufreq/brcm,stb-avs-cpu-freq.txt > +F: Documentation/devicetree/bindings/clock/brcm,brcmstb-cpu-clk-div.txt > F: drivers/cpufreq/brcmstb* > > BROADCOM SPECIFIC AMBA DRIVER (BCMA) > -- > 2.7.4 >