From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <linux-kernel-owner@vger.kernel.org>
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
        id S932393AbdA3PsH (ORCPT <rfc822;w@1wt.eu>);
        Mon, 30 Jan 2017 10:48:07 -0500
Received: from mga06.intel.com ([134.134.136.31]:5314 "EHLO mga06.intel.com"
        rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP
        id S1753728AbdA3PsG (ORCPT <rfc822;linux-kernel@vger.kernel.org>);
        Mon, 30 Jan 2017 10:48:06 -0500
X-ExtLoop1: 1
X-IronPort-AV: E=Sophos;i="5.33,312,1477983600"; 
   d="scan'208";a="815044160"
Date: Mon, 30 Jan 2017 17:38:57 +0200
From: Mika Westerberg <mika.westerberg@linux.intel.com>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: Heikki Krogerus <heikki.krogerus@linux.intel.com>,
        Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
        "David E . Box" <david.e.box@linux.intel.com>,
        "linux-gpio@vger.kernel.org" <linux-gpio@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 1/3] pinctrl: intel: Add support for hardware debouncer
Message-ID: <20170130153857.GN17297@lahna.fi.intel.com>
References: <20170127100716.194910-1-mika.westerberg@linux.intel.com>
 <20170127100716.194910-2-mika.westerberg@linux.intel.com>
 <CACRpkdbDuOOzsOBYC+oqogQ3QQU-0EFft9KjkvvbTE9kt4VjCg@mail.gmail.com>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
In-Reply-To: <CACRpkdbDuOOzsOBYC+oqogQ3QQU-0EFft9KjkvvbTE9kt4VjCg@mail.gmail.com>
Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo
User-Agent: Mutt/1.7.1 (2016-10-04)
Sender: linux-kernel-owner@vger.kernel.org
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

On Mon, Jan 30, 2017 at 03:03:32PM +0100, Linus Walleij wrote:
> On Fri, Jan 27, 2017 at 11:07 AM, Mika Westerberg
> <mika.westerberg@linux.intel.com> wrote:
> 
> > The next generation Intel GPIO hardware has two additional registers
> > PADCFG2 and PADCFG3. The latter is marked as reserved but the former
> > includes configuration for per-pad hardware debouncer.
> >
> > This patch adds support for that in the Intel pinctrl core driver. Since
> > these are additional features on top of the current generation hardware,
> > we use revision number and feature flags to enable this if detected.
> >
> > Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
> > Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
> 
> Patch applied no matter what the build robot says.
> Days like these it is like C-3PO.

Thanks!

> This ended up really pretty I think, didn't it? :)

Totally agree. Thanks for the suggestion :)