From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751946AbdBJKef (ORCPT ); Fri, 10 Feb 2017 05:34:35 -0500 Received: from foss.arm.com ([217.140.101.70]:60746 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751238AbdBJKeb (ORCPT ); Fri, 10 Feb 2017 05:34:31 -0500 Date: Fri, 10 Feb 2017 09:56:10 +0000 From: Catalin Marinas To: Christopher Covington Cc: Jonathan Corbet , Marc Zyngier , Will Deacon , linux-doc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Mark Rutland , linux-kernel@vger.kernel.org, shankerd@codeaurora.org, timur@codeaurora.org, sulrich@codeaurora.org, Jon Masters , Neil Leeder , Mark Langsdorf , Mark Salter Subject: Re: [PATCH v7] arm64: Work around Falkor erratum 1003 Message-ID: <20170210095609.GA497@e104818-lin.cambridge.arm.com> References: <20170208200838.12038-1-cov@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20170208200838.12038-1-cov@codeaurora.org> User-Agent: Mutt/1.5.23 (2014-03-12) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Feb 08, 2017 at 03:08:37PM -0500, Christopher Covington wrote: > The Qualcomm Datacenter Technologies Falkor v1 CPU may allocate TLB entries > using an incorrect ASID when TTBRx_EL1 is being updated. When the erratum > is triggered, page table entries using the new translation table base > address (BADDR) will be allocated into the TLB using the old ASID. All > circumstances leading to the incorrect ASID being cached in the TLB arise > when software writes TTBRx_EL1[ASID] and TTBRx_EL1[BADDR], a memory > operation is in the process of performing a translation using the specific > TTBRx_EL1 being written, and the memory operation uses a translation table > descriptor designated as non-global. EL2 and EL3 code changing the EL1&0 > ASID is not subject to this erratum because hardware is prohibited from > performing translations from an out-of-context translation regime. > > Consider the following pseudo code. > > write new BADDR and ASID values to TTBRx_EL1 > > Replacing the above sequence with the one below will ensure that no TLB > entries with an incorrect ASID are used by software. > > write reserved value to TTBRx_EL1[ASID] > ISB > write new value to TTBRx_EL1[BADDR] > ISB > write new value to TTBRx_EL1[ASID] > ISB > > When the above sequence is used, page table entries using the new BADDR > value may still be incorrectly allocated into the TLB using the reserved > ASID. Yet this will not reduce functionality, since TLB entries incorrectly > tagged with the reserved ASID will never be hit by a later instruction. > > Based on work by Shanker Donthineni > > Signed-off-by: Christopher Covington Reviewed-by: Catalin Marinas