From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752503AbdBUPkX (ORCPT ); Tue, 21 Feb 2017 10:40:23 -0500 Received: from mail-qk0-f182.google.com ([209.85.220.182]:36202 "EHLO mail-qk0-f182.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751709AbdBUPkN (ORCPT ); Tue, 21 Feb 2017 10:40:13 -0500 Date: Tue, 21 Feb 2017 10:40:10 -0500 From: Sean Paul To: Chris Zhong Cc: john@metanate.com, dianders@chromium.org, tfiga@chromium.org, heiko@sntech.de, yzq@rock-chips.com, mark.rutland@arm.com, devicetree@vger.kernel.org, robh+dt@kernel.org, galak@codeaurora.org, pawel.moll@arm.com, seanpaul@chromium.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org Subject: Re: [RESEND PATCH v7 6/7] drm/rockchip/dsi: fix insufficient bandwidth of some panel Message-ID: <20170221154010.GB25168@art_vandelay> References: <1487577744-2855-1-git-send-email-zyw@rock-chips.com> <1487577744-2855-7-git-send-email-zyw@rock-chips.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1487577744-2855-7-git-send-email-zyw@rock-chips.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Feb 20, 2017 at 04:02:22PM +0800, Chris Zhong wrote: > Set the lanes bps to 1 / 0.9 times of pclk, the margin is not enough > for some panel, it will cause the screen display is not normal, so > increases the badnwidth to 1 / 0.8. > > Signed-off-by: Chris Zhong Reviewed-by: Sean Paul > --- > > Changes in v6: None > Changes in v5: None > Changes in v4: None > Changes in v3: None > > drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c > index c2d7674..a653384 100644 > --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c > +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c > @@ -532,8 +532,8 @@ static int dw_mipi_dsi_get_lane_bps(struct dw_mipi_dsi *dsi, > > mpclk = DIV_ROUND_UP(mode->clock, MSEC_PER_SEC); > if (mpclk) { > - /* take 1 / 0.9, since mbps must big than bandwidth of RGB */ > - tmp = mpclk * (bpp / dsi->lanes) * 10 / 9; > + /* take 1 / 0.8, since mbps must big than bandwidth of RGB */ > + tmp = mpclk * (bpp / dsi->lanes) * 10 / 8; > if (tmp < max_mbps) > target_mbps = tmp; > else > -- > 2.6.3 > > _______________________________________________ > dri-devel mailing list > dri-devel@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/dri-devel -- Sean Paul, Software Engineer, Google / Chromium OS