From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754484AbdBVCay (ORCPT ); Tue, 21 Feb 2017 21:30:54 -0500 Received: from mx2.suse.de ([195.135.220.15]:55774 "EHLO mx2.suse.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753829AbdBVCaG (ORCPT ); Tue, 21 Feb 2017 21:30:06 -0500 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= To: linux-arm-kernel@lists.infradead.org Cc: Eric Miao , Haojian Zhuang , info@andromedabox.org, linux-kernel@vger.kernel.org, =?UTF-8?q?Andreas=20F=C3=A4rber?= , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , devicetree@vger.kernel.org Subject: [PATCH v2 8/8] ARM64: dts: marvell: iap140-andromeda-box-edge: Add uart0 clock Date: Wed, 22 Feb 2017 03:29:28 +0100 Message-Id: <20170222022929.10540-9-afaerber@suse.de> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20170222022929.10540-1-afaerber@suse.de> References: <20170222022929.10540-1-afaerber@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Use a fixed clock to enable ttyS0 output. Signed-off-by: Andreas Färber --- v1 -> v2: unchanged arch/arm64/boot/dts/marvell/iap140-andromeda-box-edge.dts | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/marvell/iap140-andromeda-box-edge.dts b/arch/arm64/boot/dts/marvell/iap140-andromeda-box-edge.dts index 0b0b150..15ad0f3 100644 --- a/arch/arm64/boot/dts/marvell/iap140-andromeda-box-edge.dts +++ b/arch/arm64/boot/dts/marvell/iap140-andromeda-box-edge.dts @@ -63,6 +63,12 @@ device_type = "memory"; reg = <0x0 0x0 0x0 0x40000000>; }; + + uart0_clk: uart0-clk { + compatible = "fixed-clock"; + clock-frequency = <14740000>; + #clock-cells = <0>; + }; }; &pmx { @@ -77,4 +83,5 @@ &uart0 { status = "okay"; + clocks = <&uart0_clk>; }; -- 2.10.2