From mboxrd@z Thu Jan  1 00:00:00 1970
Return-Path: <linux-kernel-owner@vger.kernel.org>
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
        id S932729AbdBVOXB (ORCPT <rfc822;w@1wt.eu>);
        Wed, 22 Feb 2017 09:23:01 -0500
Received: from mail-pg0-f65.google.com ([74.125.83.65]:33668 "EHLO
        mail-pg0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org
        with ESMTP id S932643AbdBVOWu (ORCPT
        <rfc822;linux-kernel@vger.kernel.org>);
        Wed, 22 Feb 2017 09:22:50 -0500
Date: Wed, 22 Feb 2017 23:22:46 +0900
From: Stafford Horne <shorne@gmail.com>
To: Peter Zijlstra <peterz@infradead.org>
Cc: Jonas Bonn <jonas@southpole.se>,
        Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>,
        linux@roeck-us.net, openrisc@lists.librecores.org,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 09/25] openrisc: add optimized atomic operations
Message-ID: <20170222142246.GC2449@lianli.shorne-pla.net>
References: <cover.1487702890.git.shorne@gmail.com>
 <1479fc4a4a18712003849341affe74b2a0da609a.1487702890.git.shorne@gmail.com>
 <20170222112737.GM6515@twins.programming.kicks-ass.net>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
In-Reply-To: <20170222112737.GM6515@twins.programming.kicks-ass.net>
User-Agent: Mutt/1.7.1 (2016-10-04)
Sender: linux-kernel-owner@vger.kernel.org
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

On Wed, Feb 22, 2017 at 12:27:37PM +0100, Peter Zijlstra wrote:
> On Wed, Feb 22, 2017 at 04:11:38AM +0900, Stafford Horne wrote:
> > +#define atomic_add_return	atomic_add_return
> > +#define atomic_sub_return	atomic_sub_return
> > +#define atomic_fetch_add	atomic_fetch_add
> > +#define atomic_fetch_sub	atomic_fetch_sub
> > +#define atomic_fetch_and	atomic_fetch_and
> > +#define atomic_fetch_or		atomic_fetch_or
> > +#define atomic_fetch_xor	atomic_fetch_xor
> > +#define atomic_and	atomic_and
> > +#define atomic_or	atomic_or
> > +#define atomic_xor	atomic_xor
> > +
> 
> It would be good to also implement __atomic_add_unless().
> 
> Something like so, if I got your asm right..
> 
> static inline int __atomic_add_unless(atomic_t *v, int a, int u)
> {
> 	int old, tmp;
> 
> 	__asm__ __volatile__(
> 		"1:     l.lwa %0, 0(%2)         \n"
> 		"       l.sfeq %0, %4           \n"
> 		"       l.bf 2f                 \n"
> 		"        l.nop                  \n"
> 		"	l.add %1, %0, %3	\n"
> 		"       l.swa 0(%2), %1         \n"
> 		"       l.bnf 1b                \n"
> 		"2:      l.nop                  \n"
> 		: "=&r"(old), "=&r" (tmp)
> 		: "r"(&v->counter), "r"(a), "r"(u)
> 		: "cc", "memory");
> 
> 	return old;
> }

Ok, thanks this looks right. I tested it too and it looks to work ok.

Note, I still include <asm-generic/atomic.h> to avoid copy-n-pastes.  So
I also wrapped __atomic_add_unless with #ifndef __atomic_add_unless in
the generic code.

-Stafford