From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754320AbdCMUtm (ORCPT ); Mon, 13 Mar 2017 16:49:42 -0400 Received: from mail-pg0-f68.google.com ([74.125.83.68]:33431 "EHLO mail-pg0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753885AbdCMUtX (ORCPT ); Mon, 13 Mar 2017 16:49:23 -0400 From: Arushi Singhal To: w.d.hubbs@gmail.com Cc: chris@the-brannons.com, outreachy-kernel@googlegroups.com, kirk@reisers.ca, samuel.thibault@ens-lyon.org, gregkh@linuxfoundation.org, speakup@linux-speakup.org, devel@driverdev.osuosl.org, linux-kernel@vger.kernel.org, Arushi Singhal Subject: [PATCH v3 3/4] staging: sm750fb: Alignment should match open parenthesis Date: Tue, 14 Mar 2017 02:18:49 +0530 Message-Id: <20170313204853.24675-4-arushisinghal19971997@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170313204853.24675-1-arushisinghal19971997@gmail.com> References: <20170313204853.24675-1-arushisinghal19971997@gmail.com> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Fix checkpatch issues: "CHECK: Alignment should match open parenthesis". Signed-off-by: Arushi Singhal --- drivers/staging/sm750fb/ddk750_mode.c | 79 +++++++++++++++++------------------ 1 file changed, 39 insertions(+), 40 deletions(-) diff --git a/drivers/staging/sm750fb/ddk750_mode.c b/drivers/staging/sm750fb/ddk750_mode.c index 45af806c8d55..eea5aef2956f 100644 --- a/drivers/staging/sm750fb/ddk750_mode.c +++ b/drivers/staging/sm750fb/ddk750_mode.c @@ -28,9 +28,9 @@ static unsigned long displayControlAdjust_SM750LE(mode_parameter_t *pModeParam, poke32(CRT_AUTO_CENTERING_TL, 0); poke32(CRT_AUTO_CENTERING_BR, - (((y - 1) << CRT_AUTO_CENTERING_BR_BOTTOM_SHIFT) & - CRT_AUTO_CENTERING_BR_BOTTOM_MASK) | - ((x - 1) & CRT_AUTO_CENTERING_BR_RIGHT_MASK)); + (((y - 1) << CRT_AUTO_CENTERING_BR_BOTTOM_SHIFT) & + CRT_AUTO_CENTERING_BR_BOTTOM_MASK) | + ((x - 1) & CRT_AUTO_CENTERING_BR_RIGHT_MASK)); /* * Assume common fields in dispControl have been properly set before @@ -72,8 +72,7 @@ static unsigned long displayControlAdjust_SM750LE(mode_parameter_t *pModeParam, } /* only timing related registers will be programed */ -static int programModeRegisters(mode_parameter_t *pModeParam, - struct pll_value *pll) +static int programModeRegisters(mode_parameter_t *pModeParam, struct pll_value *pll) { int ret = 0; int cnt = 0; @@ -83,32 +82,32 @@ static int programModeRegisters(mode_parameter_t *pModeParam, /* programe secondary pixel clock */ poke32(CRT_PLL_CTRL, sm750_format_pll_reg(pll)); poke32(CRT_HORIZONTAL_TOTAL, - (((pModeParam->horizontal_total - 1) << - CRT_HORIZONTAL_TOTAL_TOTAL_SHIFT) & - CRT_HORIZONTAL_TOTAL_TOTAL_MASK) | - ((pModeParam->horizontal_display_end - 1) & - CRT_HORIZONTAL_TOTAL_DISPLAY_END_MASK)); + (((pModeParam->horizontal_total - 1) << + CRT_HORIZONTAL_TOTAL_TOTAL_SHIFT) & + CRT_HORIZONTAL_TOTAL_TOTAL_MASK) | + ((pModeParam->horizontal_display_end - 1) & + CRT_HORIZONTAL_TOTAL_DISPLAY_END_MASK)); poke32(CRT_HORIZONTAL_SYNC, - ((pModeParam->horizontal_sync_width << - CRT_HORIZONTAL_SYNC_WIDTH_SHIFT) & - CRT_HORIZONTAL_SYNC_WIDTH_MASK) | - ((pModeParam->horizontal_sync_start - 1) & - CRT_HORIZONTAL_SYNC_START_MASK)); + ((pModeParam->horizontal_sync_width << + CRT_HORIZONTAL_SYNC_WIDTH_SHIFT) & + CRT_HORIZONTAL_SYNC_WIDTH_MASK) | + ((pModeParam->horizontal_sync_start - 1) & + CRT_HORIZONTAL_SYNC_START_MASK)); poke32(CRT_VERTICAL_TOTAL, - (((pModeParam->vertical_total - 1) << - CRT_VERTICAL_TOTAL_TOTAL_SHIFT) & - CRT_VERTICAL_TOTAL_TOTAL_MASK) | - ((pModeParam->vertical_display_end - 1) & - CRT_VERTICAL_TOTAL_DISPLAY_END_MASK)); + (((pModeParam->vertical_total - 1) << + CRT_VERTICAL_TOTAL_TOTAL_SHIFT) & + CRT_VERTICAL_TOTAL_TOTAL_MASK) | + ((pModeParam->vertical_display_end - 1) & + CRT_VERTICAL_TOTAL_DISPLAY_END_MASK)); poke32(CRT_VERTICAL_SYNC, - ((pModeParam->vertical_sync_height << - CRT_VERTICAL_SYNC_HEIGHT_SHIFT) & - CRT_VERTICAL_SYNC_HEIGHT_MASK) | - ((pModeParam->vertical_sync_start - 1) & - CRT_VERTICAL_SYNC_START_MASK)); + ((pModeParam->vertical_sync_height << + CRT_VERTICAL_SYNC_HEIGHT_SHIFT) & + CRT_VERTICAL_SYNC_HEIGHT_MASK) | + ((pModeParam->vertical_sync_start - 1) & + CRT_VERTICAL_SYNC_START_MASK)); tmp = DISPLAY_CTRL_TIMING | DISPLAY_CTRL_PLANE; if (pModeParam->vertical_sync_polarity) @@ -140,25 +139,25 @@ static int programModeRegisters(mode_parameter_t *pModeParam, poke32(PANEL_HORIZONTAL_TOTAL, reg); poke32(PANEL_HORIZONTAL_SYNC, - ((pModeParam->horizontal_sync_width << - PANEL_HORIZONTAL_SYNC_WIDTH_SHIFT) & - PANEL_HORIZONTAL_SYNC_WIDTH_MASK) | - ((pModeParam->horizontal_sync_start - 1) & - PANEL_HORIZONTAL_SYNC_START_MASK)); + ((pModeParam->horizontal_sync_width << + PANEL_HORIZONTAL_SYNC_WIDTH_SHIFT) & + PANEL_HORIZONTAL_SYNC_WIDTH_MASK) | + ((pModeParam->horizontal_sync_start - 1) & + PANEL_HORIZONTAL_SYNC_START_MASK)); poke32(PANEL_VERTICAL_TOTAL, - (((pModeParam->vertical_total - 1) << - PANEL_VERTICAL_TOTAL_TOTAL_SHIFT) & - PANEL_VERTICAL_TOTAL_TOTAL_MASK) | - ((pModeParam->vertical_display_end - 1) & - PANEL_VERTICAL_TOTAL_DISPLAY_END_MASK)); + (((pModeParam->vertical_total - 1) << + PANEL_VERTICAL_TOTAL_TOTAL_SHIFT) & + PANEL_VERTICAL_TOTAL_TOTAL_MASK) | + ((pModeParam->vertical_display_end - 1) & + PANEL_VERTICAL_TOTAL_DISPLAY_END_MASK)); poke32(PANEL_VERTICAL_SYNC, - ((pModeParam->vertical_sync_height << - PANEL_VERTICAL_SYNC_HEIGHT_SHIFT) & - PANEL_VERTICAL_SYNC_HEIGHT_MASK) | - ((pModeParam->vertical_sync_start - 1) & - PANEL_VERTICAL_SYNC_START_MASK)); + ((pModeParam->vertical_sync_height << + PANEL_VERTICAL_SYNC_HEIGHT_SHIFT) & + PANEL_VERTICAL_SYNC_HEIGHT_MASK) | + ((pModeParam->vertical_sync_start - 1) & + PANEL_VERTICAL_SYNC_START_MASK)); tmp = DISPLAY_CTRL_TIMING | DISPLAY_CTRL_PLANE; if (pModeParam->vertical_sync_polarity) -- 2.11.0