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From: John Keeping <john@metanate.com>
To: Chris Zhong <zyw@rock-chips.com>
Cc: linux-rockchip@lists.infradead.org,
	Heiko Stuebner <heiko@sntech.de>, David Airlie <airlied@linux.ie>,
	linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
	linux-arm-kernel@lists.infradead.org,
	Mark Yao <mark.yao@rock-chips.com>
Subject: Re: [PATCH v2 1/4] drm/rockchip/dsi: check phy_cfg_clk only for RK3399
Date: Thu, 16 Mar 2017 10:55:00 +0000	[thread overview]
Message-ID: <20170316105500.675b413f.john@metanate.com> (raw)
In-Reply-To: <1489635107-21327-2-git-send-email-zyw@rock-chips.com>

On Thu, 16 Mar 2017 11:31:44 +0800, Chris Zhong wrote:

> For RK3399, the phy_cfg_clk is a required clock, if phy_cfg_clk is
> disabled, MIPI phy can not work. Let's return a error if there is no
> phy_cfg_clk in dts property, when the pdata match RK3399.
> 
> Signed-off-by: Chris Zhong <zyw@rock-chips.com>
> ---
> 
> Changes in v2: None
> 
>  drivers/gpu/drm/rockchip/dw-mipi-dsi.c | 10 ++++------
>  1 file changed, 4 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
> index f84f9ae..11c4166 100644
> --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
> +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
> @@ -1227,15 +1227,13 @@ static int dw_mipi_dsi_bind(struct device *dev, struct device *master,
>  		clk_disable_unprepare(dsi->pclk);
>  	}
>  
> -	dsi->phy_cfg_clk = devm_clk_get(dev, "phy_cfg");
> -	if (IS_ERR(dsi->phy_cfg_clk)) {
> -		ret = PTR_ERR(dsi->phy_cfg_clk);
> -		if (ret != -ENOENT) {
> +	if (pdata == &rk3399_mipi_dsi_drv_data) {

This will get messy if the next SOC also needs phy_cfg_clk.  Can we do
something like:

	if (pdata->flags & DW_MIPI_NEEDS_PHY_CFG_CLK) {
		...

> +		dsi->phy_cfg_clk = devm_clk_get(dev, "phy_cfg");
> +		if (IS_ERR(dsi->phy_cfg_clk)) {
> +			ret = PTR_ERR(dsi->phy_cfg_clk);
>  			dev_err(dev, "Unable to get phy_cfg_clk: %d\n", ret);
>  			return ret;
>  		}
> -		dsi->phy_cfg_clk = NULL;
> -		dev_dbg(dev, "have not phy_cfg_clk\n");
>  	}
>  
>  	ret = clk_prepare_enable(dsi->pllref_clk);

  reply	other threads:[~2017-03-16 10:55 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-16  3:31 [PATCH v2 0/4] RK3399 dw-mipi-dsi patches Chris Zhong
2017-03-16  3:31 ` [PATCH v2 1/4] drm/rockchip/dsi: check phy_cfg_clk only for RK3399 Chris Zhong
2017-03-16 10:55   ` John Keeping [this message]
2017-03-17  1:19     ` Chris Zhong
2017-03-16  3:31 ` [PATCH v2 2/4] dt-bindings: add the grf clock for dw-mipi-dsi Chris Zhong
2017-03-16  3:31 ` [PATCH v2 3/4] drm/rockchip/dsi: enable the grf clk before writing grf registers Chris Zhong
2017-03-16  3:31 ` [PATCH v2 4/4] drm/rockchip/dsi: correct the grf_switch_reg name Chris Zhong
2017-03-17  0:34 ` [PATCH v2 0/4] RK3399 dw-mipi-dsi patches Brian Norris

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