From: Borislav Petkov <bp@alien8.de>
To: "Ghannam, Yazen" <Yazen.Ghannam@amd.com>
Cc: "linux-edac@vger.kernel.org" <linux-edac@vger.kernel.org>,
Tony Luck <tony.luck@intel.com>,
"x86@kernel.org" <x86@kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 1/2] x86/mce/AMD: Redo use of SMCA MCA_DE{STAT,ADDR} registers
Date: Wed, 5 Apr 2017 18:44:33 +0200 [thread overview]
Message-ID: <20170405164433.jo2wghk7jvtsgdq7@pd.tnic> (raw)
In-Reply-To: <BN6PR1201MB0131DADDCB1DE3C789EF2173F80A0@BN6PR1201MB0131.namprd12.prod.outlook.com>
On Wed, Apr 05, 2017 at 02:52:08PM +0000, Ghannam, Yazen wrote:
> Yes, BIOS does and should set this bit. If it doesn't for some reason
> then our handling in the Kernel will still be functional. We just
> won't find Deferred errors in MCA_STATUS.
Ok.
> I'd rather we keep as many checks as possible out of __log_error().
What checks?
> Your suggestion gave me an idea. Let's drop __log_error_deferred() and just
> select the correct registers in the deferred error interrupt handler.
>
> /*
> * APIC interrupt handler for deferred errors
> *
> * We have three scenarios for checking for Deferred errors.
> * 1) Non-SMCA systems check MCA_STATUS and log error if found.
> * 2) SMCA systems check MCA_STATUS. If error is found then log it and also
> * clear MCA_DESTAT.
> * 3) SMCA systems check MCA_DESTAT, if error was not found in MCA_STATUS, and
> * log it.
> */
> static void amd_deferred_error_interrupt(void)
> {
> unsigned int bank;
> u64 status;
>
> for (bank = 0; bank < mca_cfg.banks; ++bank) {
> rdmsrl(msr_ops.status(bank), status);
>
> if (is_deferred_error(status)) {
> __log_error(bank, msr_ops.status(bank), msr_ops.addr(bank), 0);
So we're an SMCA box and we land here on a deferred error, we don't have
anything in the standard MSRs...
> /* Clear MCA_DESTAT even if we used MCA_STATUS. */
> if (mce_flags.smca)
> wrmsrl(MSR_AMD64_SMCA_MCx_DESTAT(bank), 0);
... and here we clear the info which we wanted to log before we log it!
>
> } else if (mce_flags.smca) {
> rdmsrl(MSR_AMD64_SMCA_MCx_DESTAT(bank), status);
>
> if (is_deferred_error(status))
> __log_error(bank, MSR_AMD64_SMCA_MCx_DESTAT(bank), MSR_AMD64_SMCA_MCx_DEADDR(bank), 0);
So we execute __log_error() twice on an SMCA box for a deferred error.
So no, I'd like to see clear code flow which does what the guidance is.
And if you feel it is not readable enough then you restructure more. And
I gave you a perfectly fine __log_error_deferred() which actually does
what the guidance is.
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
next prev parent reply other threads:[~2017-04-05 16:45 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-04-04 17:24 Yazen Ghannam
2017-04-04 17:24 ` [PATCH v2 2/2] x86/mce/AMD: Carve out SMCA bank configuration Yazen Ghannam
2017-04-05 14:19 ` Borislav Petkov
2017-04-05 13:39 ` [PATCH v2 1/2] x86/mce/AMD: Redo use of SMCA MCA_DE{STAT,ADDR} registers Borislav Petkov
2017-04-05 14:52 ` Ghannam, Yazen
2017-04-05 16:44 ` Borislav Petkov [this message]
2017-04-05 17:06 ` Ghannam, Yazen
2017-04-05 17:22 ` Borislav Petkov
2017-04-05 17:53 ` Ghannam, Yazen
2017-04-05 18:22 ` Borislav Petkov
2017-04-05 19:29 ` Ghannam, Yazen
2017-04-05 20:04 ` Borislav Petkov
2017-04-07 20:37 ` Ghannam, Yazen
2017-04-07 21:35 ` Borislav Petkov
2017-04-11 12:53 ` Ghannam, Yazen
2017-04-11 13:12 ` Borislav Petkov
2017-04-11 13:18 ` Ghannam, Yazen
2017-04-11 13:24 ` Borislav Petkov
2017-04-11 13:32 ` Ghannam, Yazen
2017-04-11 13:35 ` Borislav Petkov
2017-04-11 13:50 ` Ghannam, Yazen
2017-04-11 13:54 ` Borislav Petkov
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